Inventor
BARRY EDWIN F
US30 patents
⚠️ This page may combine multiple inventors who share the name “BARRY EDWIN F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
PTS CORP
13 patentsUS6865663B2Mar 8, 2005
Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling mode
PTS CORP42 citations96
US6769056B2Jul 27, 2004
Methods and apparatus for manifold array processing
PTS CORP42 citations96
US6954842B2Oct 11, 2005
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
PTS CORP28 citations92
US6848041B2Jan 25, 2005
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
PTS CORP15 citations92
US6795909B2Sep 21, 2004
Methods and apparatus for ManArray PE-PE switch control
PTS CORP20 citations92
US6775766B2Aug 10, 2004
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
PTS CORP29 citations92
US6760831B2Jul 6, 2004
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
PTS CORP29 citations92
US6735690B1May 11, 2004
Specifying different type generalized event and action pair in a processor
PTS CORP25 citations92
US7010668B2Mar 7, 2006
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
PTS CORP24 citations89
US6868490B1Mar 15, 2005
Methods and apparatus for providing context switching between software tasks with reconfigurable control
PTS CORP12 citations84
US7017029B2Mar 21, 2006
Coprocessor instruction loading from port register based on interrupt vector table indication
PTS CORP5 citations74
US6834295B2Dec 21, 2004
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller
PTS CORP4 citations73
US6986020B2Jan 10, 2006
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller
PTS CORP1 citations62
BOPS INC
11 patentsUS6366999B1Apr 2, 2002
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
BOPS INC130 citations99
US6557094B2Apr 29, 2003
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
BOPS INC48 citations96
US6446190B1Sep 3, 2002
Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor
BOPS INC59 citations96
US6356994B1Mar 12, 2002
Methods and apparatus for instruction addressing in indirect VLIW processors
BOPS INC75 citations96
US6321322B1Nov 20, 2001
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
BOPS INC35 citations96
US6470441B1Oct 22, 2002
Methods and apparatus for manifold array processing
BOPS INC32 citations92
US6467036B1Oct 15, 2002
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
BOPS INC34 citations92
US6430677B2Aug 6, 2002
Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision
BOPS INC30 citations92
US6343356B1Jan 29, 2002
Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision
BOPS INC24 citations92
US6581152B2Jun 17, 2003
Methods and apparatus for instruction addressing in indirect VLIW processors
BOPS INC14 citations84
US6366997B1Apr 2, 2002
Methods and apparatus for manarray PE-PE switch control
BOPS INC5 citations74
BILLIONS OF OPERATIONS PER SEC
5 patentsUS6173389B1Jan 9, 2001
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
BILLIONS OF OPERATIONS PER SEC207 citations99
US6167502ADec 26, 2000
Method and apparatus for manifold array processing
BILLIONS OF OPERATIONS PER SEC148 citations98
US6216223B1Apr 10, 2001
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
BILLIONS OF OPERATIONS PER SEC122 citations96
US6167501ADec 26, 2000
Methods and apparatus for manarray PE-PE switch control
BILLIONS OF OPERATIONS PER SEC44 citations96
US6101592AAug 8, 2000
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
BILLIONS OF OPERATIONS PER SEC71 citations96