Inventor

LOO SIM Y

US3 patents

⚠️ This page may combine multiple inventors who share the name “LOO SIM Y”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANG PAUL

1 patent

US8626480B2Jan 7, 2014

Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors

CHANG PAUL20 citations90

GLOBALFOUNDRIES INC

1 patent

US9639652B2May 2, 2017

Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors

GLOBALFOUNDRIES INC2 citations71

IBM

1 patent

US8032349B2Oct 4, 2011

Efficient methodology for the accurate generation of customized compact model parameters from electrical test data

IBM0 citations37