Inventor

BROX MARTIN

DE122 patents

⚠️ This page may combine multiple inventors who share the name “BROX MARTIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BROX MARTIN

MICRON TECHNOLOGY INC

Multiple memory die techniques

Transmission failure feedback schemes for reducing crosstalk

Multi-level receiver with termination-off mode

Training procedure for receivers associated with a memory device

Multi-level signaling for a memory device

Phase clock correction

Temperature-based memory management

Transmission failure feedback schemes for reducing crosstalk

Dynamic control of error management and signaling

Dynamically configuring transmission lines of a bus

Phase clock correction

Training procedure for receivers associated with a memory device

Pre-distortion for multi-level signaling

Bit and signal level mapping

Phase lock circuitry using frequency detection

Overheat protection circuit and method in an accelerated aging test of an integrated circuit

Back-bias optimization

Replacement scheme for a pulse amplitude modulated bus

Multi-voltage operation for driving a multi-mode channel

Semiconductor dies supporting multiple packaging configurations and associated methods

Configuring command/address channel for memory

INFINEON TECHNOLOGIES AG

Semiconductor memory device and method for operating a semiconductor memory device

Devices for synchronizing clock signals

Duty-cycle correction circuit

Memory configuration with a central connection area

Segmented word line architecture for dividing up a word line into a plurality of banks for cell arrays having long bit lines

Voltage generator with standby operating mode

Apparatus and method for controlling a driver strength

Multi-level driver stage

Driver circuit with reduced jitter between circuit domains

Digital signal delay device

Semiconductor memory having tri-state driver device

Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor memory device

Voltage regulation system

sense amplifier having low-voltage threshold transistors

Integrated circuit and method for controlling a power supply thereof

Level shifter without dutycycle distortion

Circuit configuration for adjusting signal delay times

SIEMENS AG

Memory with word line voltage control

Configuration for crosstalk attenuation in word lines of DRAM circuits

Integrated semiconductor memory

Apparatus for controlling circuit response during power-up

QIMONDA AG

Method for producing a circuit module comprising at least one integrated circuit

Asynchronous data transmission

Circuit having a clock signal synchronizing device with capability to filter clock-jitter

LODESTAR LICENSING GROUP LLC

Multi-voltage operation for driving a multi-mode channel

Channel modulation for a memory device

Dynamic control of error management and signaling

RICHTER MICHAEL

Semiconductor memory with memory cell portions having different access speeds

SCHNEIDER ANDREAS

Interface voltage adjustment based on error detection