Inventor

GARA ALAN G

US68 patents

⚠️ This page may combine multiple inventors who share the name “GARA ALAN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GARA ALAN G

IBM

Massively parallel supercomputer

Optimized scalable network switch

Ultrascalable petaflop parallel supercomputer

Method and apparatus for efficient performance monitoring of a large number of simultaneous events

Low complexity speculative multithreading system based on unmodified microprocessor core

Method and apparatus for filtering snoop requests using multiple snoop caches

Fault isolation through no-overhead link level CRC

Low latency memory access and synchronization

Global tree network for computing structures enabling global processing operations

Class network routing

Method for prefetching non-contiguous data structures

One-bounce network

Global interrupt and barrier networks

Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture

Snoop filtering system in a multiprocessor system

Snoop filter for filtering snoop requests

Arithmetic functions in torus and tree networks

Low latency memory access and synchronization

Checkpointing filesystem

Deterministic error recovery protocol

System for efficient performance monitoring of a large number of simultaneous events

Low complexity speculative multithreading system based on unmodified microprocessor core

DMA engine for repeating communication patterns

Configurable memory system and method for providing atomic counting operations in a memory device

System and method for programmable bank selection for banked memory subsystems

Multiple node remote messaging

DMA shared byte counters in a parallel computer

Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture

Multidimensional switch network

Method and apparatus for filtering snoop requests using stream registers

Architectural support for thread level speculative execution

Twin-tailed fail-over for fileservers maintaining full performance in the presence of a failure

Fault tolerance in a supercomputer through dynamic repartitioning

Error correcting code with chip kill capability and power saving enhancement

Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer

Space and power efficient hybrid counters array

Method and apparatus for filtering snoop requests using multiple snoop caches

BLUMRICH MATTHIAS A

Massively parallel supercomputer

Massively parallel supercomputer

Snoop filter for filtering snoop requests

Method and apparatus for filtering snoop requests using stream registers

Snoop filtering system in a multiprocessor system

Simplifying and speeding the management of intra-node cache coherence

INTEL CORP

Processors, methods, and systems with a configurable spatial accelerator

Mitigating component performance variation

CHIU GEORGE

Shared performance monitor in a multiprocessor system

Shared performance monitor in a multiprocessor system

BELLOFATTO RALPH E

Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan

GARA ALAN G

Combined group ECC protection and subgroup parity protection

BODAS DEVADATTA V

Managing power consumption and performance of computing systems