Inventor
SCOTT BYRON D
US4 patents
Patents
4 patentsUS6668358B2Dec 23, 2003
Dual threshold gate array or standard cell power saving library circuits
IBM41 citations88
US7661047B2Feb 9, 2010
Method and dual interlocked storage cell latch for implementing enhanced testability
IBM9 citations79
US7661046B2Feb 9, 2010
Method and dual interlocked storage cell latch for implementing enhanced testability
IBM2 citations57
US7698681B2Apr 13, 2010
Method for radiation tolerance by logic book folding
IBM0 citations48