P

Inventor

YEGNASHANKARAN VISVAMOHAN

US37 patents
⚠️ This page may combine multiple inventors who share the name “YEGNASHANKARAN VISVAMOHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NAT SEMICONDUCTOR CORP

31 patents
US6949421B1Sep 27, 2005

Method of forming a vertical MOS transistor

NAT SEMICONDUCTOR CORP240 citations99
US7075133B1Jul 11, 2006

Semiconductor die with heat and electrical pipes

NAT SEMICONDUCTOR CORP57 citations96
US7192819B1Mar 20, 2007

Semiconductor sensor device using MEMS technology

NAT SEMICONDUCTOR CORP21 citations92
US6881943B1Apr 19, 2005

Convex image sensor and method of forming the sensor

NAT SEMICONDUCTOR CORP33 citations92
US6833781B1Dec 21, 2004

High Q inductor in multi-level interconnect

NAT SEMICONDUCTOR CORP27 citations92
US6781239B1Aug 24, 2004

Integrated circuit and method of forming the integrated circuit having a die with high Q inductors and capacitors attached to a die with a circuit as a flip chip

NAT SEMICONDUCTOR CORP21 citations92
US6677235B1Jan 13, 2004

Silicon die with metal feed through structure

NAT SEMICONDUCTOR CORP29 citations92
US6100590AAug 8, 2000

Low capacitance multilevel metal interconnect structure and method of manufacture

NAT SEMICONDUCTOR CORP36 citations92
US6933212B1Aug 23, 2005

Apparatus and method for dicing semiconductor wafers

NAT SEMICONDUCTOR CORP25 citations90
US7996034B1Aug 9, 2011

Cellular telephone handset with increased reception sensitivity and reduced transmit power levels

NAT SEMICONDUCTOR CORP18 citations84
US7705421B1Apr 27, 2010

Semiconductor die with an integrated inductor

NAT SEMICONDUCTOR CORP11 citations84
US7633131B1Dec 15, 2009

MEMS semiconductor sensor device

NAT SEMICONDUCTOR CORP9 citations84
US7329555B1Feb 12, 2008

Method of selectively forming MEMS-based semiconductor devices at the end of a common fabrication process

NAT SEMICONDUCTOR CORP13 citations84
US7052977B1May 30, 2006

Method of dicing a semiconductor wafer that substantially reduces the width of the saw street

NAT SEMICONDUCTOR CORP11 citations84
US7042092B1May 9, 2006

Multilevel metal interconnect and method of forming the interconnect with capacitive structures that adjust the capacitance of the interconnect

NAT SEMICONDUCTOR CORP7 citations74
US6946321B1Sep 20, 2005

Method of forming the integrated circuit having a die with high Q inductors and capacitors attached to a die with a circuit as a flip chip

NAT SEMICONDUCTOR CORP8 citations74
US6777288B1Aug 17, 2004

Vertical MOS transistor

NAT SEMICONDUCTOR CORP6 citations74
US6730969B1May 4, 2004

Radiation hardened MOS transistor

NAT SEMICONDUCTOR CORP9 citations73
US7338840B1Mar 4, 2008

Method of forming a semiconductor die with heat and electrical pipes

NAT SEMICONDUCTOR CORP4 citations63
US7098095B1Aug 29, 2006

Method of forming a MOS transistor with a layer of silicon germanium carbon

NAT SEMICONDUCTOR CORP4 citations63
US7863644B1Jan 4, 2011

Bipolar transistor and method of forming the bipolar transistor with a backside contact

NAT SEMICONDUCTOR CORP2 citations62
US7790602B1Sep 7, 2010

Method of forming a metal interconnect with capacitive structures that adjust the capacitance of the interconnect

NAT SEMICONDUCTOR CORP1 citations52
US7764517B2Jul 27, 2010

Power supply with reduced power consumption when a load is disconnected from the power supply

NAT SEMICONDUCTOR CORP0 citations52
US7754502B1Jul 13, 2010

Backside defect detector and method that determines whether unwanted materials are present on the backside of a semiconductor wafer

NAT SEMICONDUCTOR CORP1 citations52
US7646064B1Jan 12, 2010

Semiconductor die with aluminum-spiked heat pipes

NAT SEMICONDUCTOR CORP0 citations52
US7482228B1Jan 27, 2009

Method of forming a MOS transistor with a litho-less gate

NAT SEMICONDUCTOR CORP1 citations52
US7230301B1Jun 12, 2007

Single-crystal silicon semiconductor structure

NAT SEMICONDUCTOR CORP0 citations52
US6746956B1Jun 8, 2004

Hermetic seal for silicon die with metal feed through structure

NAT SEMICONDUCTOR CORP1 citations52
US6723593B1Apr 20, 2004

Deep submicron MOS transistor with increased threshold voltage

NAT SEMICONDUCTOR CORP0 citations52
US7188044B1Mar 6, 2007

World-wide distributed testing for integrated circuits

NAT SEMICONDUCTOR CORP1 citations51
US7109571B1Sep 19, 2006

Method of forming a hermetic seal for silicon die with metal feed through structure

NAT SEMICONDUCTOR CORP0 citations42

XIAO JIMMY YONG

2 patents

LSI LOGIC CORP

1 patent

HOPPER PETER J

1 patent

YEGNASHANKARAN VISVAMOHAN

1 patent

PADMANABHAN GOBI R

1 patent