Inventor

KHADERBAD MRUNAL A

TW35 patents

⚠️ This page may combine multiple inventors who share the name “KHADERBAD MRUNAL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KHADERBAD MRUNAL A

TAIWAN SEMICONDUCTOR MFG CO LTD

Method and structure for barrier-less plug

Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof

Semiconductor device with source/drain contact formed using bottom-up deposition

Low resistance fill metal layer material as stressor in metal gates

Semiconductor structure with material modification and low resistance plug

Selective dual silicide formation using a maskless fabrication process flow

Method of forming contact plugs for semiconductor device

Semiconductor device, interconnection structure and method for forming the same

Contact interface engineering for reducing contact resistance

Contact plugs for semiconductor device and method of forming same

Contact and via structures for semiconductor devices

Low resistance fill metal layer material as stressor in metal gates

Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof

Semiconductor structure with material modification and low resistance plug

Method and structure for barrier-less plug

Semiconductor device with source/drain contact formed using bottom-up deposition

Method and structure for barrier-less plug

Low resistance fill metal layer material as stressor in metal gates

Semiconductor structure with material modification and low resistance plug

Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof

Contact plugs for semiconductor device

Selective dual silicide formation using a maskless fabrication process flow

Method of forming metal contact for semiconductor device

Contact and via structures for semiconductor devices

Contact interface engineering for reducing contact resistance

Semiconductor device having gate dielectric and inhibitor film over gate dielectric

Semiconductor structure with metal containing layer

Method for manufacturing semiconductor structure using selective forming process

Selective dual silicide formation using a maskless fabrication process flow

Conductive structure formed by cyclic chemical vapor deposition

Semiconductor device having gate body and inhibitor film between conductive prelayer over gate body and conductive layer over inhibitor film

Fin field effect transistor (FinFET)

Semiconductor device with sidewall passivation and method of making

TAIWAN SEMICONDUCTOR MFG

Semiconductor device fabrication method and structure

Method of forming trench on FinFET and FinFET thereof