Inventor
YUAN DER-MIN
TW27 patents
⚠️ This page may combine multiple inventors who share the name “YUAN DER-MIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ETRON TECHNOLOGY INC
16 patentsUS6453381B1Sep 17, 2002
DDR DRAM data coherence scheme
ETRON TECHNOLOGY INC58 citations95
US7184341B2Feb 27, 2007
Method of data flow control for a high speed memory
ETRON TECHNOLOGY INC11 citations83
US6543015B1Apr 1, 2003
Efficient data compression circuit for memory testing
ETRON TECHNOLOGY INC14 citations83
US7277315B2Oct 2, 2007
Multiple power supplies for the driving circuit of local word line driver of DRAM
ETRON TECHNOLOGY INC15 citations81
US7359265B2Apr 15, 2008
Data flow scheme for low power DRAM
ETRON TECHNOLOGY INC8 citations73
US6934899B2Aug 23, 2005
Variable self-time scheme for write recovery by low speed tester
ETRON TECHNOLOGY INC8 citations73
US9310816B2Apr 12, 2016
Immediate response low dropout regulation system and operation method of a low dropout regulation system
ETRON TECHNOLOGY INC5 citations70
US7978525B2Jul 12, 2011
Data flow scheme for low power DRAM
ETRON TECHNOLOGY INC1 citations62
US7924641B2Apr 12, 2011
Data flow scheme for low power DRAM
ETRON TECHNOLOGY INC1 citations62
US7843754B2Nov 30, 2010
Method of reducing current of memory in self-refreshing mode and related memory
ETRON TECHNOLOGY INC4 citations62
US7370250B2May 6, 2008
Test patterns to insure read signal integrity for high speed DDR DRAM
ETRON TECHNOLOGY INC6 citations62
US7940588B2May 10, 2011
Chip testing circuit
ETRON TECHNOLOGY INC2 citations60
US8345500B2Jan 1, 2013
Memory having a disabling circuit and method for disabling the memory
ETRON TECHNOLOGY INC1 citations51
US7663949B2Feb 16, 2010
Memory row architecture having memory row redundancy repair function
ETRON TECHNOLOGY INC0 citations51
US7576597B2Aug 18, 2009
Electronic device and related method for performing compensation operation on electronic element
ETRON TECHNOLOGY INC1 citations51
US7983102B2Jul 19, 2011
Data detecting apparatus and methods thereof
ETRON TECHNOLOGY INC0 citations41
YUAN DER-MIN
4 patentsUS8432206B2Apr 30, 2013
Delay lock loop system with a self-tracking function and method thereof
YUAN DER-MIN3 citations59
US8228751B2Jul 24, 2012
Method of reducing current of memory in self-refreshing mode and related memory
YUAN DER-MIN0 citations50
US8154940B2Apr 10, 2012
Method of reducing current of memory in self-refreshing mode and related memory
YUAN DER-MIN0 citations50
US8169228B2May 1, 2012
Chip testing circuit
YUAN DER-MIN0 citations38
ETRON TECH INC
3 patentsUS12154652B2Nov 26, 2024
Dynamic random access memory applied to an embedded display port
ETRON TECH INC0 citations62
US11894098B2Feb 6, 2024
Dynamic random access memory applied to an embedded display port
ETRON TECH INC0 citations62
US10998017B2May 4, 2021
Dynamic random access memory applied to an embedded display port
ETRON TECH INC0 citations62