Inventor
SARIPALLI RAMESH
US5 patents
Patents
5 patentsUS6715000B2Mar 30, 2004
Method and device for providing high data rate for a serial peripheral interface
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US7818604B2Oct 19, 2010
Pipelined clock stretching circuitry and method for I2C logic system
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US7444440B2Oct 28, 2008
Method and device for providing high data rate for a serial peripheral interface
TEXAS INSTRUMENTS INC3 citations61
US7366809B2Apr 29, 2008
Pipelined stop, start, address byte, and data byte technique and circuit for I2C logic system
TEXAS INSTRUMENTS INC6 citations60
US7151414B2Dec 19, 2006
Method and circuit for frequency synthesis using a low drift current controlled oscillator with wide output frequency range
TEXAS INSTRUMENTS INC2 citations58