Inventor

SHIAH CHUN

TW54 patents

⚠️ This page may combine multiple inventors who share the name “SHIAH CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIAH CHUN

ETRON TECHNOLOGY INC

Datapath architecture for high area efficiency

Address decoding scheme for DDR memory

Area efficient global row redundancy scheme for DRAM

Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof

Circuit to independently adjust rise and fall edge timing of a signal

Level boost restoration circuit

Duty cycle correction circuit

DRAM refresh scheme with flexible frequency for active and standby mode

Flexible time write operation

VCO with stabilized reference current source module

Bundled memory and manufacture method for a bundled memory with an external input/output bus

Method to improve the write speed for memory products

Semiconductor die structure featuring a triple pad organization

Low jitter input buffer with small input signal swing

Duty cycle correction circuit with wide-frequency working range

Dynamic input setup/hold time improvement architecture

Memory and method of refreshing a memory

Delayed-locked loop with power-saving function

Memory module with failed memory cell repair function and method thereof

Signal sensing circuit and semiconductor memory device using the same

Output circuit with overshoot-reducing function

Delay-locked loop and method for a delay-locked loop generating an application clock

Bundled memory and manufacture method for a bundled memory with an external input/output bus

Negative voltage noise-free circuit for multi-functional pad

Memory device with bi-directional tracking of timing constraints

DLL circuit with dynamic phase-chasing function and method thereof

Distributed bit switch logically interleaved for block write performance

Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof

Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof

Data detecting apparatus and methods thereof

ETRON TECH INC

Memory circuit with improved read and write access

Dynamic memory with long retention time

Memory system, memory controller and memory chip

Memory controller and related memory

Memory device

Sustainable DRAM having principle power supply voltage unified with logic circuit

Dynamic memory with sustainable storage architecture

Dynamic memory with sustainable storage architecture and clean up circuit

Dynamic memory with sustainable storage architecture

Bundled memory and manufacture method for a bundled memory with an external input/output bus

Memory circuit capable of being quickly written in data

Circuit for outputting information of a memory circuit during a self-refresh mode and related method thereof

Memory with low current consumption and method for reducing current consumption of a memory

SHIAH CHUN

Method to improve the write speed for memory products

Latch system applied to a plurality of banks of a memory circuit

Input buffer system with a dual-input buffer switching function and method thereof

Method of sharing in use an impedance matching circuit of a memory circuit to perform an initial calibration and a full time refresh mode calibration, and memory circuit with an impedance matching circuit capable of being used in an initial calibration and a full time refresh mode calibration

YUAN DER-MIN

Delay lock loop system with a self-tracking function and method thereof

INVENT AND COLLABORATION LABORATORY PTE LTD

Memory array circuit

IND TECH RES INST

Memory with variable operation voltage and the adjusting method thereof