Inventor

CARTER RICHARD J

US51 patents

⚠️ This page may combine multiple inventors who share the name “CARTER RICHARD J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CARTER RICHARD J

GLOBALFOUNDRIES INC

Integrated circuits with varying gate structures and fabrication methods

Integrated circuit having multiple threshold voltages

Method of forming a semiconductor device

Methods of removing fins so as to form isolation structures on products that include FinFET semiconductor devices

Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits

Devices and methods of forming fins at tight fin pitches

Fabrication methods facilitating integration of different device architectures

Methods for preventing oxidation damage during FinFET fabrication

Overlay performance for a fin field effect transistor device

Epitaxial block layer for a fin field effect transistor device

Uniform exposed raised structures for non-planar semiconductor devices

Modified, etch-resistant gate structure(s) facilitating circuit fabrication

Methods for removing photoresist from semiconductor structures having high-k dielectric material layers

Preventing EPI damage for cap nitride strip scheme in a Fin-shaped field effect transistor (FinFET) device

Epitaxial block layer for a fin field effect transistor device

HEWLETT PACKARD DEVELOPMENT CO

Extensible three dimensional circuit

System for aborting response to client request if detecting connection between client server is closed by examining local server information

Long-period counter without carries

Seedable pseudo-random number generator

Algorithm-to-hardware system and method for creating a digital circuit

Memory having multiple write ports and write insert unit, and method of operation

Pipelined digital circuit for determining the conformational energy of a folded protein

Memory having multiple write ports and multiple control memory units, and method of operation

Peripheral signal handling in extensible three dimensional circuits

Extensible three dimensional circuit having parallel array channels

Memory having multiple write ports and method of operation

CARTER RICHARD J

Systems and methods for row-wire voltage-loss compensation in crossbar arrays

Protecting the privacy of files referenced by their hash

Semiconductor device with isolation trench liner

Programmed-state detection in memristor stacks

Semiconductor device with isolation trench liner

Programmable current-limited voltage buffer, integrated-circuit device and method for current-limiting a memory element

NANTERO INC

Isolated metal plug process for use in fabricating carbon nanotube memory cells

Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers

Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers

Isolated metal plug process for use in fabricating carbon nanotube memory cells

Self-aligned cell integration scheme

HEWLETT PACKARD CO

Fast multiple-word accesses from a multi-way set-associative cache memory

Virtual to physical address translation

Distributed fair arbitration system using separate grant and request lines for providing access to data communication bus

ADVANCED MICRO DEVICES INC

Integrated circuit long and short channel metal gate devices and method of manufacture

Semiconductor device with isolation trench liner, and related fabrication methods

Integrated circuit having long and short channel metal gate devices and method of manufacture

LSI CORP

Application of gate edge liner to maintain gate length CD in a replacement gate transistor flow

Application of gate edge liner to maintain gate length CD in a replacement gate transistor flow

HEWLETT PACKARD ENTPR DEV LP

Buffer-based update of state data

Buffer-based update of state data

LSI LOGIC CORP

Nano structure electrode design

BATTELLE MEMORIAL INSTITUTE

Lexicon generation methods, lexicon generation devices, and lexicon generation articles of manufacture

WASYLUK JOANNA

Methods for pFET fabrication using APM solutions