Inventor

SHRIDHAR AVADHANI

US22 patents

⚠️ This page may combine multiple inventors who share the name “SHRIDHAR AVADHANI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHRIDHAR AVADHANI

KIOXIA CORP

System and method for NAND multi-plane and multi-die status signaling

System and method for NAND multi-plane and multi-die status signaling

Page buffer enhancements

Page buffer enhancements

Explicit buffer control

Multiple parallel mode flash channels with serial link

HITACHI AMERICA LTD

Method and apparatus for reducing the power consumption in a programmable digital signal processor

System and method for performing a fast fourier transform using a matrix-vector multiply instruction

Embedded debug commands in a source file

Repeat-bit based, compact system and method for implementing zero-overhead loops

Modulo arithmetic addressing circuit

IKANOS COMMUNICATIONS INC

Method and apparatus for synchronizing a packet based modem supporting multiple X-DSL protocols

Method and apparatus for differentiated communication channel robustness in a multi-tone transceiver

Method and apparatus for managing joining events for G.fast vectoring with discontinuous operation

IKANOS COMM INC

Method and apparatus for a variable bandwidth multi-protocol X-DSL transceiver

Method and apparatus for dynamic multi-line bonding in communication systems

Method and apparatus for an interleaver

VELOCITY COMMUNICATION INC

Method and apparatus for a DFT/IDFT engine supporting multiple X-DSL protocols

Method and apparatus for a X-DSL communication processor

Method and apparatus for providing packet based and distributed xDSL communications

HEIDARI SAM

Method and apparatus for a multi-tone modem

SHRIDHAR AVADHANI

System and method for partitioning DSL vector cancellation