Inventor

HURAT PHILIPPE

US5 patents

⚠️ This page may combine multiple inventors who share the name “HURAT PHILIPPE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NUMERICAL TECH INC

2 patents

US6807663B2Oct 19, 2004

Accelerated layout processing using OPC pre-processing

NUMERICAL TECH INC230 citations98

US6745372B2Jun 1, 2004

Method and apparatus for facilitating process-compliant layout optimization

NUMERICAL TECH INC243 citations98

SYNOPSYS INC

1 patent

US7458045B2Nov 25, 2008

Silicon tolerance specification using shapes as design intent markers

SYNOPSYS INC201 citations94

CADENCE DESIGN SYSTEMS INC

1 patent

US11574111B1Feb 7, 2023

Electronic design tracing and tamper detection using automatically generated layout patterns

CADENCE DESIGN SYSTEMS INC3 citations68

COTE MICHEL

1 patent

US8255840B2Aug 28, 2012

Silicon tolerance specification using shapes as design intent markers

COTE MICHEL1 citations41