Inventor

YOUNG CHARLES CHEW-YUEN

US117 patents

⚠️ This page may combine multiple inventors who share the name “YOUNG CHARLES CHEW-YUEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YOUNG CHARLES CHEW-YUEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of forming semiconductor device including source/drain contact having height below gate stack

Metal rail conductors for non-planar semiconductor devices

Asynchronous read circuit using delay sensing in magnetoresistive random access memory (MRAM)

Integrated circuit and method of manufacturing same

Asynchronous read circuit using delay sensing in magnetoresistive random access memory (MRAM)

Method and related apparatus for improving memory cell performance in semiconductor-on-insulator technology

Metal rail conductors for non-planar semiconductor devices

Metal rail conductors for non-planar semiconductor devices

Metal patterning for internal cell routing

System and method for calculating cell edge leakage

Method of manufacturing conductors and semiconductor device which includes conductors

System for and method of manufacturing a layout design of an integrated circuit

Semiconductor device including source/drain contact having height below gate stack

Semiconductor device with reduced leakage current

Power strap structure for high performance and low current density

Middle end-of-line strap for standard cell

Dual power structure with connection pins

High fin cut fabrication process

Semiconductor device including source/drain contact having height below gate stack

Semiconductor device including source/drain contact having height below gate stack

Middle-end-of-line strap for standard cell

Asynchronous read circuit using delay sensing in magnetoresistive random access memory (mRAM)

Method and system of manufacturing conductors and semiconductor device which includes conductors

Semiconductor device including source/drain contact having height below gate stack

Middle-end-of-line strap for standard cell

Metal rail conductors for non-planar semiconductor devices

Metal patterning for internal cell routing

Via rail solution for high power electromigration

Local interconnect structure

System for and method of manufacturing an integrated circuit

Method and system of manufacturing conductors and semiconductor device which includes conductors

High-density semiconductor device

Silicon on insulator semiconductor device with mixed doped regions

FinFET switch

Middle-end-of-line strap for standard cell

System and method for calculating cell edge leakage

Power strap structure for high performance and low current density

Semiconductor device including source/drain contact having height below gate stack

Semiconductor device which includes Fins

Silicon on insulator semiconductor device with mixed doped regions

Via rail solution for high power electromigration

NVIDIA CORP

Low power single rail input voltage level shifter

Sequentially-accessed 1R/1W double-pumped single port SRAM with shared decoder architecture

Active bit line charge keeper

Process variation tolerant sense amplifier flop design

Low power single-rail-input voltage level shifter

High-speed single-ended memory read circuit

2-write 3-read SRAM design using a 12-T storage cell

Self-timed dynamic sense amplifier flop circuit apparatus and method

SCOTZNIOVSKY STEFAN

Functional component compensation reconfiguration system and method