Inventor

VAIDYANATHAN KARTHIK

US131 patents

⚠️ This page may combine multiple inventors who share the name “VAIDYANATHAN KARTHIK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VAIDYANATHAN KARTHIK

INTEL CORP

Apparatus and method for asynchronous ray tracing

Cluster of scalar engines to accelerate intersection in leaf node

Variable shading

Apparatus and method for reduced precision bounding volume hierarchy construction

Page cache system and method for multi-agent environments

Compute optimization mechanism for deep neural networks

Controlling coarse pixel size from a stencil buffer

Decoupled shading pipeline

Layered reconstruction for defocus and motion blur

Compute optimization mechanism for deep neural networks

Apparatus and method for motion blur with a dynamic quantization grid

Controlling coarse pixel size from a stencil buffer

Motion biased foveated renderer

Apparatus and method using triangle pairs and shared transformation circuitry to improve ray tracing performance

Compute optimization mechanism for deep neural networks

Tile-based immediate mode rendering with early hierarchical-z

Conditional shader for graphics

Compute optimization mechanism for deep neural networks

Motion biased foveated renderer

Controlling coarse pixel size from a stencil buffer

Apparatus and method for a compressed stack representation for hierarchical acceleration structures of arbitrary widths

Order independent asynchronous compute and streaming for graphics

Efficient prediction of most commonly occuring values in data blocks in computing environments

Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer

Level of detail selection during ray tracing

Method and apparatus for filtered coarse pixel shading

Motion biased foveated renderer

Reduced precision ray traversal with plane reuse

Techniques for reduced pixel shading

Layered reconstruction for defocus and motion blur

Techniques to manage execution of divergent shaders

Apparatus and method for a hierarchical beam tracer

Compression for sparse data structures utilizing mode search approximation

Programmable re-order buffer for decompression

Programmable re-order buffer for decompression

Apparatus and method for hierarchical adaptive tessellation

Apparatus and method for throttling a ray tracing pipeline

Apparatus and method for routing data from ray tracing cache banks

Apparatus and method for reduced precision bounding volume hierarchy construction

Compute optimization mechanism for deep neural networks

Apparatus and method for throttling a ray tracing pipeline

Synergistic temporal anti-aliasing and coarse pixel shading technology

Apparatus and method for reduced precision bounding volume hierarchy construction

Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method

Mutli-frame renderer

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

VAIDYANATHAN KARTHIK

Analog to digital converter bit width and gain controller for a wireless receiver

INTEL CORPOATION

Apparatus and method for efficient graphics processing including ray tracing