Inventor

OUZIEL IDO

IL26 patents

⚠️ This page may combine multiple inventors who share the name “OUZIEL IDO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OUZIEL IDO

INTEL CORP

Method and apparatus for fine grain memory protection

System, apparatus and method for page granular, software controlled multiple key memory encryption

Validating virtual address translation by virtual machine monitor utilizing address validation structure to validate tentative guest physical address and aborting based on flag in extended page table requiring an expected guest physical address in the address validation structure

Restricting usage of encryption keys by untrusted software

Restricting usage of encryption keys by untrusted software

Apparatus and method to identify the source of an interrupt

Avoiding asynchronous enclave exits based on requests to invalidate translation lookaside buffer entries

Restartable cache write-back and invalidation

Hardware mechanism for performing atomic actions on remote processors

Providing isolation in virtualized systems using trust domains

System, apparatus and method for page granular, software controlled multiple key memory encryption

Co-existence of trust domain architecture with multi-key total memory encryption technology in servers

System, apparatus and method for page granular,software controlled multiple key memory encryption

Apparatus and method to identify the source of an interrupt

Apparatus and method to identify the source of an interrupt

Restartable cache write-back and invalidation

Multi-key cryptographic memory protection

Multicore system for fusing instructions queued during a dynamically adjustable time window

Branch prediction unit in service of short microcode flows

Method and apparatus for supporting quasi-posted loads

RAPPOPORT LIHU

Efficient method and apparatus for employing a micro-op cache in a processor

Method and apparatus for inclusion of TLB entries in a micro-op cache of a processor

Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor

VALENTINE ROBERT

Representing a plurality of instructions with a fewer number of micro-operations

SAHITA RAVI

Execution profiling mechanism

OUZIEL IDO

System and method for fusing instructions queued during a time window defined by a delay counter