Inventor
KAO SHU-YI
TW20 patents
⚠️ This page may combine multiple inventors who share the name “KAO SHU-YI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
REALTEK SEMICONDUCTOR CORP
19 patentsUS11194945B1Dec 7, 2021
Clock deadlock detecting system, method, and non-transitory computer readable storage medium
REALTEK SEMICONDUCTOR CORP0 citations59
US11010521B2May 18, 2021
Method of detecting relations between pins of circuit and computer program product thereof
REALTEK SEMICONDUCTOR CORP0 citations59
US10909290B2Feb 2, 2021
Method of detecting a circuit malfunction and related device
REALTEK SEMICONDUCTOR CORP0 citations59
US9003341B2Apr 7, 2015
Method for determining interface timing of integrated circuit automatically and related machine readable medium thereof
REALTEK SEMICONDUCTOR CORP2 citations59
US11314912B2Apr 26, 2022
IC design data base generating method, IC design method, and electronic device using the methods
REALTEK SEMICONDUCTOR CORP0 citations56
US10936784B2Mar 2, 2021
Planning method for power metal lines
REALTEK SEMICONDUCTOR CORP1 citations55
US10657303B2May 19, 2020
Circuit encoding method and circuit structure recognition method
REALTEK SEMICONDUCTOR CORP1 citations53
US11455449B2Sep 27, 2022
Method for determining IC voltage and method for finding relation between voltages and circuit parameters
REALTEK SEMICONDUCTOR CORP0 citations50
US12488168B2Dec 2, 2025
Circuit verification method
REALTEK SEMICONDUCTOR CORP0 citations49
US11959956B2Apr 16, 2024
Circuit check method and electronic apparatus
REALTEK SEMICONDUCTOR CORP0 citations49
US10783293B2Sep 22, 2020
Circuit design system, checking method, and non-transitory computer readable medium thereof
REALTEK SEMICONDUCTOR CORP0 citations49
US10521529B2Dec 31, 2019
Simulation method for mixed-signal circuit system and related electronic device
REALTEK SEMICONDUCTOR CORP0 citations49
US9858382B2Jan 2, 2018
Computer program product for timing analysis of integrated circuit
REALTEK SEMICONDUCTOR CORP1 citations49
US8726206B1May 13, 2014
Deadlock detection method and related machine readable medium
REALTEK SEMICONDUCTOR CORP1 citations49
US10997353B2May 4, 2021
Integrated circuit design method and non-transitory computer readable medium thereof
REALTEK SEMICONDUCTOR CORP0 citations46
US10860758B2Dec 8, 2020
Method of using simulation software to generate circuit layout
REALTEK SEMICONDUCTOR CORP0 citations45
US11416665B2Aug 16, 2022
Power rail design method, apparatus and non-transitory computer readable medium thereof
REALTEK SEMICONDUCTOR CORP0 citations44
US8713497B2Apr 29, 2014
Method of generating integrated circuit model
REALTEK SEMICONDUCTOR CORP0 citations38
US10778214B1Sep 15, 2020
Circuit structure and power-on method thereof
REALTEK SEMICONDUCTOR CORP0 citations35