Inventor

TALBOT GERALD R

US43 patents

⚠️ This page may combine multiple inventors who share the name “TALBOT GERALD R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TALBOT GERALD R

ADVANCED MICRO DEVICES INC

Method and apparatus for scrambling data for control of high-speed bidirectional signaling

System including a host connected to a plurality of memory modules via a serial memory interconnect

Method and apparatus to reduce the effect of crosstalk in a communications interface

Transmit based equalization using a voltage mode driver

Method and apparatus for crosstalk reduction

Input offset correction for asymmetric control of high-speed bidirectional signaling

System for phase tracking and equalization across a byte group for asymmetric control of high-speed bidirectional signaling

System including a single ended switching topology for high-speed bidirectional signaling

Selective insertion of clock mismatch compensation symbols in signal transmissions based on a receiver&#39;s compensation capability

Active equalizing negative resistance amplifier for bi-directional bandwidth extension

Channel training using a replica lane

Channel training using a replica lane

Deskewing method for a physical layer interface on a multi-chip module

Pseudo differential receiving mechanism for single-ended signaling

Deskewing method for a physical layer interface on a multi-chip module

System for protecting data during high-speed bidirectional communication between a master device and a slave device

Periodic receiver clock data recovery with dynamic data edge

Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links

Deskewing method for a physical layer interface on a multi-chip module

Low power VTT generation mechanism for receiver termination

Receiver equalization circuitry using variable termination and T-coil

Skew matching in a die-to-die interface

Method and apparatus for power-up detection for an electrical monitoring circuit

Three-stage differential ring oscillator generating differential in-phase and quadrature-phase clocks

Land pad design for high speed terminals

Asynchronous feedback training

GLOBALFOUNDRIES INC

Memory controller including a dual-mode memory interconnect

Memory controller including a dual-mode memory interconnect

Memory system including asymmetric high-speed differential memory interconnect

System for controlling high-speed bidirectional communication

In-band method to configure equalization levels

Asymmetric control of high-speed bidirectional signaling

ATI TECHNOLOGIES ULC

Alternative protocol over physical layer

Alternative protocol over physical layer

Data communications with enhanced speed mode

Alternative protocol selection

INMOS LTD

Integrated circuit phase locked loop timing apparatus

Color graphics control system

TALBOT GERALD R

Transmitter voltage and receiver time margining

Programmable delay module testing device and methods thereof

ALLIANCE SEMICONDUCTOR CORP

Low latency synchronization of asynchronous data

DEARTH GLENN A

Method and apparatus for memory access delay training

MANGASER RAMON

Method and apparatus for using DFE in a system with non-continuous data

Selective insertion of clock mismatch compensation symbols in signal transmissions based on a receiver's compensation capability