Inventor
VENKATESH ABHISHEK
IN54 patents
Patents
50 patentsUS10235735B2Mar 19, 2019
Graphics processor with tiled compute kernels
INTEL CORP15 citations86
US10861126B1Dec 8, 2020
Asynchronous execution mechanism
INTEL CORP5 citations84
US10109078B1Oct 23, 2018
Controlling coarse pixel size from a stencil buffer
INTEL CORP5 citations84
US11869119B2Jan 9, 2024
Controlling coarse pixel size from a stencil buffer
INTEL CORP2 citations73
US11062506B2Jul 13, 2021
Tile-based immediate mode rendering with early hierarchical-z
INTEL CORP3 citations73
US10964087B2Mar 30, 2021
Leveraging control surface fast clears to optimize 3D operations
INTEL CORP1 citations73
US10930060B2Feb 23, 2021
Conditional shader for graphics
INTEL CORP2 citations73
US10783603B2Sep 22, 2020
Graphics processor with tiled compute kernels
INTEL CORP5 citations73
US10733690B2Aug 4, 2020
GPU mixed primitive topology type processing
INTEL CORP2 citations73
US10706591B2Jul 7, 2020
Controlling coarse pixel size from a stencil buffer
INTEL CORP1 citations73
US10643374B2May 5, 2020
Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer
INTEL CORP3 citations73
US10522113B2Dec 31, 2019
Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technology
INTEL CORP1 citations72
US12086705B2Sep 10, 2024
Compute optimization mechanism for deep neural networks
INTEL CORP3 citations70
US10796397B2Oct 6, 2020
Facilitating dynamic runtime transformation of graphics processing commands for improved graphics performance at computing devices
INTEL CORP6 citations70
US11948017B2Apr 2, 2024
Thread modification to reduce command conversion latency
INTEL CORP2 citations68
US10163179B2Dec 25, 2018
Method and apparatus for intelligent cloud-based graphics updates
INTEL CORP3 citations66
US11871142B2Jan 9, 2024
Synergistic temporal anti-aliasing and coarse pixel shading technology
INTEL CORP0 citations63
US11663774B2May 30, 2023
Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method
INTEL CORP0 citations63
US11636567B2Apr 25, 2023
Mutli-frame renderer
INTEL CORP0 citations63
US11302066B2Apr 12, 2022
Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method
INTEL CORP0 citations63
US11252370B2Feb 15, 2022
Synergistic temporal anti-aliasing and coarse pixel shading technology
INTEL CORP0 citations63
US11132759B2Sep 28, 2021
Mutli-frame renderer
INTEL CORP0 citations63
US10229468B2Mar 12, 2019
Automated conversion of GPGPU workloads to 3D pipeline workloads
INTEL CORP1 citations63
US12243125B2Mar 4, 2025
Controlling coarse pixel size from a stencil buffer
INTEL CORP0 citations62
US11762696B2Sep 19, 2023
Hybrid low power homogenous grapics processing units
INTEL CORP0 citations62
US11763515B2Sep 19, 2023
Leveraging control surface fast clears to optimize 3D operations
INTEL CORP0 citations62
US11688366B2Jun 27, 2023
Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technology
INTEL CORP0 citations62
US11494867B2Nov 8, 2022
Asynchronous execution mechanism
INTEL CORP0 citations62
US11461959B2Oct 4, 2022
Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer
INTEL CORP0 citations62
US11263720B2Mar 1, 2022
Frequent data value compression for graphics processing units
INTEL CORP0 citations62
US11257182B2Feb 22, 2022
GPU mixed primitive topology type processing
INTEL CORP0 citations62
US11244479B2Feb 8, 2022
Controlling coarse pixel size from a stencil buffer
INTEL CORP0 citations62
US11169850B2Nov 9, 2021
Hybrid low power homogenous grapics processing units
INTEL CORP0 citations62
US11107444B2Aug 31, 2021
Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technology
INTEL CORP0 citations62
US10242494B2Mar 26, 2019
Conditional shader for graphics
INTEL CORP1 citations61
US12488527B2Dec 2, 2025
3D graphics driver to split frames into multiple command buffer submissions based on analysis of previous frames
INTEL CORP0 citations60
US11151683B2Oct 19, 2021
Use of inner coverage information by a conservative rasterization pipeline to enable EarlyZ for conservative rasterization
INTEL CORP0 citations52
US11030713B2Jun 8, 2021
Extended local memory including compressed on-chip vertex data
INTEL CORP0 citations52
US10937126B2Mar 2, 2021
Tile-based multiple resolution rendering of images
INTEL CORP0 citations52
US10867427B2Dec 15, 2020
Multi-resolution image plane rendering within an improved graphics processor microarchitecture
INTEL CORP0 citations52
US10803656B2Oct 13, 2020
Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method
INTEL CORP0 citations52
US10728492B2Jul 28, 2020
Synergistic temporal anti-aliasing and coarse pixel shading technology
INTEL CORP0 citations52
US10706612B2Jul 7, 2020
Tile-based immediate mode rendering with early hierarchical-z
INTEL CORP0 citations52
US10573066B2Feb 25, 2020
Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method
INTEL CORP0 citations52
US10521271B2Dec 31, 2019
Hybrid low power homogenous grapics processing units
INTEL CORP0 citations52
US10453241B2Oct 22, 2019
Multi-resolution image plane rendering within an improved graphics processor microarchitecture
INTEL CORP0 citations52
US10445923B2Oct 15, 2019
Leveraging control surface fast clears to optimize 3D operations
INTEL CORP0 citations52
US10204394B2Feb 12, 2019
Multi-frame renderer
INTEL CORP0 citations52
US10192351B2Jan 29, 2019
Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method
INTEL CORP0 citations52
US9563930B2Feb 7, 2017
Techniques for clearing a shared surface
INTEL CORP0 citations52
Showing the top 50 of 54 patents by PatentIndex Score.