Inventor
ARAYAMA MASASHI
JP6 patents
⚠️ This page may combine multiple inventors who share the name “ARAYAMA MASASHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FUJITSU LTD
3 patentsUS6434728B1Aug 13, 2002
Activation path simulation equipment and activation path simulation method
FUJITSU LTD7 citations71
US8000951B2Aug 16, 2011
Timing analysis method and apparatus for enhancing accuracy of timing analysis and improving work efficiency thereof
FUJITSU LTD5 citations58
US7739638B2Jun 15, 2010
Circuit analyzing device, circuit analyzing method, program, and computer readable information recording medium considering influence of signal input to peripheral circuit which does not have logical influence
FUJITSU LTD0 citations37
ARAYAMA MASASHI
3 patentsUS8286117B2Oct 9, 2012
Macro layout verification apparatus to detect error when connecting macro terminal in LSI design layout
ARAYAMA MASASHI5 citations66
US8539412B2Sep 17, 2013
Macro layout verification appartus
ARAYAMA MASASHI2 citations55
US8689167B2Apr 1, 2014
Layout design apparatus and layout design method
ARAYAMA MASASHI0 citations47