P

Inventor

ZHANG CHONG

US99 patents
⚠️ This page may combine multiple inventors who share the name “ZHANG CHONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

20 patents
US9147638B2Sep 29, 2015

Interconnect structures for embedded bridge

INTEL CORP51 citations93
US9119313B2Aug 25, 2015

Package substrate with high density interconnect design to capture conductive features on embedded die

INTEL CORP23 citations92
US11557579B2Jan 17, 2023

Microelectronic assemblies having an integrated capacitor

INTEL CORP5 citations86
US11521914B2Dec 6, 2022

Microelectronic assemblies having a cooling channel

INTEL CORP8 citations86
US11387224B2Jul 12, 2022

Phase change material in substrate cavity

INTEL CORP7 citations84
US9917044B2Mar 13, 2018

Package with bi-layered dielectric structure

INTEL CORP12 citations84
US11721677B2Aug 8, 2023

Microelectronic assemblies having an integrated capacitor

INTEL CORP1 citations73
US11696407B2Jul 4, 2023

Core layer with fully encapsulated co-axial magnetic material around PTH in IC package substrate

INTEL CORP3 citations73
US10804188B2Oct 13, 2020

Electronic device including a lateral trace

INTEL CORP5 citations73
US9953959B1Apr 24, 2018

Metal protected fan-out cavity

INTEL CORP4 citations73
US11552008B2Jan 10, 2023

Asymmetric cored integrated circuit package supports

INTEL CORP3 citations71
US12087746B2Sep 10, 2024

Microelectronic assemblies having an integrated capacitor

INTEL CORP0 citations62
US11640934B2May 2, 2023

Lithographically defined vertical interconnect access (VIA) in dielectric pockets in a package substrate

INTEL CORP0 citations62
US11527483B2Dec 13, 2022

Package including fully integrated voltage regulator circuitry within a substrate

INTEL CORP0 citations62
US11322290B2May 3, 2022

Techniques for an inductor at a first level interface

INTEL CORP0 citations62
US11246218B2Feb 8, 2022

Core layer with fully encapsulated co-axial magnetic material around PTH in IC package substrate

INTEL CORP0 citations62
US11031360B2Jun 8, 2021

Techniques for an inductor at a second level interface

INTEL CORP0 citations62
US10790159B2Sep 29, 2020

Semiconductor package substrate with through-hole magnetic core inductor using conductive paste

INTEL CORP1 citations62
US10777514B2Sep 15, 2020

Techniques for an inductor at a second level interface

INTEL CORP1 citations62
US12568831B2Mar 3, 2026

Patternable die attach materials and processes for patterning

INTEL CORP0 citations61

AYAR LABS INC

5 patents

ZHANG CHONG

5 patents

HUAWEI TECH CO LTD

2 patents

HEWLETT PACKARD ENTPR DEV LP

2 patents

QINGDAO QIYUAN CXINKEJI CO LTD

2 patents

UNIV CENTRAL FLORIDA RES FOUND

1 patent

SHENZHEN THANKSHOME TECH CO LTD

1 patent

SHANGHAI MIMENG NETWORK TECH CO LTD

1 patent

HONGFUJIN PREC IND SHENZHEN

1 patent

PARK HYUNDAI

1 patent

TAHOE RES LTD

1 patent

TRIPLE WIN TECH SHENZHEN CO LTD

1 patent

NEXUS PHOTONICS INC

1 patent

UNIV DALIAN TECH

1 patent

UNIV SOUTH CHINA

1 patent

KOMLJENOVIC TIN

1 patent

BOE TECHNOLOGY GROUP CO LTD

1 patent

HONOR DEVICE CO LTD

1 patent

LI PING

1 patent

Showing the top 50 of 99 patents by PatentIndex Score.