Inventor
MERRELL QUINN W
US10 patents
⚠️ This page may combine multiple inventors who share the name “MERRELL QUINN W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
9 patentsUS6378048B1Apr 23, 2002
“SLIME” cache coherency system for agents with multi-layer caches
INTEL CORP29 citations91
US5787469AJul 28, 1998
System and method for exclusively writing tag during write allocate requests
INTEL CORP19 citations91
US7120755B2Oct 10, 2006
Transfer of cache lines on-chip between processing cores in a multi-core system
INTEL CORP38 citations90
US7194671B2Mar 20, 2007
Mechanism handling race conditions in FRC-enabled processors
INTEL CORP14 citations82
US7694080B2Apr 6, 2010
Method and apparatus for providing a low power mode for a processor while maintaining snoop throughput
INTEL CORP3 citations62
US7487398B2Feb 3, 2009
Microprocessor design support for computer system and platform validation
INTEL CORP2 citations59
US7032134B2Apr 18, 2006
Microprocessor design support for computer system and platform validation
INTEL CORP3 citations59
US9697899B1Jul 4, 2017
Parallel deflate decoding method and apparatus
INTEL CORP1 citations49
US8373583B2Feb 12, 2013
Compression producing output exhibiting compression ratio that is at least equal to desired compression ratio
INTEL CORP0 citations49