Inventor
RAJORA PARITOSH
US4 patents
Patents
4 patentsUS6127277AOct 3, 2000
Method and apparatus for etching a semiconductor wafer with features having vertical sidewalls
TEGAL CORP21 citations91
US6046116AApr 4, 2000
Method for minimizing the critical dimension growth of a feature on a semiconductor wafer
TEGAL CORP15 citations78
US6774046B2Aug 10, 2004
Method for minimizing the critical dimension growth of a feature on a semiconductor wafer
TEGAL CORP6 citations72
US6492280B1Dec 10, 2002
Method and apparatus for etching a semiconductor wafer with features having vertical sidewalls
TEGAL CORP7 citations72