Inventor

TALPES EMIL

US36 patents

⚠️ This page may combine multiple inventors who share the name “TALPES EMIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TALPES EMIL

TESLA INC

Vector computational unit

Accelerated mathematical engine

Computational array microprocessor system with variable latency memory access

Accelerated mathematical engine

Computational array microprocessor system using non-consecutive data formatting

Accelerated mathematical engine

Vector computational unit receiving data elements in parallel from a last row of a computational array

Systems and methods for converting a matrix input to a vectorized input for a matrix processor

System and method for handling errors in a vehicle neural network processor

Computational array microprocessor system with hardware arbiter managing memory requests

Vector computational unit

Instruction set architecture for a vector computational unit

Computational array microprocessor system using non-consecutive data formatting

Scalable matrix node engine with configurable data formats

System and method for handling errors in a vehicle neural network processor

System and method for handling errors in a vehicle neural network processor

Accelerated mathematical engine

Vector computational unit

Instruction set architecture for a vector computational unit

Computational array microprocessor system using non-consecutive data formatting

System and method for handling errors in a vehicle neural network processor

Systems and methods for low latency hardware memory management

ADVANCED MICRO DEVICES INC

Hybrid tag scheduler to broadcast scheduler entry tags for picked instructions

Store-to-load forwarding

Store-to-load forwarding

Retire queue compression

Retire queue compression

Methods and systems for utilizing a master-shadow physical register file based on verified activation

Dependent instruction suppression

Dependent instruction suppression in a load-operation instruction

Tracking source availability for instructions in a scheduler instruction queue

Fastpath microcode sequencer

VENKATARAMANAN GANESH

Method and apparatus for fast decoding and enhancing execution speed of an instruction

Method and apparatus for providing early bypass detection to reduce power consumption while reading register files of a processor

ESTLICK MICHAEL D

Processor with increased efficiency via control word prediction

FLEISCHMAN JAY E

Flush operations in a processor