Inventor
FENG BAI-CWO
US9 patents
Patents
9 patentsUS5081563AJan 14, 1992
Multi-layer package incorporating a recessed cavity for a semiconductor chip
IBM246 citations95
US3976524AAug 24, 1976
Planarization of integrated circuit surfaces through selective photoresist masking
IBM70 citations95
US4038110AJul 26, 1977
Planarization of integrated circuit surfaces through selective photoresist masking
IBM54 citations91
US4022932AMay 10, 1977
Resist reflow method for making submicron patterned resist masks
IBM47 citations91
US4238559ADec 9, 1980
Two layer resist system
IBM28 citations81
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Two layer resist system
IBM29 citations81
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Forming feedthrough connections for multi-level interconnections metallurgy systems
IBM24 citations81
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Two layer resist system
IBM17 citations72
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Method of manufacturing self-aligned semiconductor devices
IBM11 citations72