Inventor

LIOU FU-TAI

US72 patents

⚠️ This page may combine multiple inventors who share the name “LIOU FU-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIOU FU-TAI

SGS THOMSON MICROELECTRONICS

Method for forming planarized shallow trench isolation in an integrated circuit and a structure formed thereby

Method for forming an aluminum contact through an insulating layer

Integrated circuit with planarized shallow trench isolation

Integrated circuit metallization with zero contact enclosure requirements and method of making the same

Method for forming a metal contact

Method for forming a contact/VIA

Method for forming a contact VIA

Method of forming vias

Sloped spacer for mos field effect devices

Method for forming local interconnect for integrated circuits

Integrated circuit metallization with zero contact enclosure requirements

Sloped spacer for MOS field effect devices comprising reflowable glass layer

Local interconnect for integrated circuits

Thin oxide structure and method

Process for making refractory metal silicide cap for protecting multi-layer polycide structure

Process for manufacturing LDD CMOS devices

Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit

Semiconductor contact via structure and method

Insulated gate field-effect transistor with gate-drain overlap and method of making the same

Semiconductor contact via structure and method

Method for forming polycrystalline silicon contacts

Local interconnect for integrated circuits

Pad oxide protect sealed interface isolation process

Local interconnect process for integrated circuits

Local interconnect for integrated circuits

Pad oxide protect sealed interface isolation

Method for reducing the surface reflectance of a metal layer during semiconductor processing

Method for forming a non-planar structure on the surface of a semiconductor substrate

Method for forming field oxide regions

Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit

Method for forming polycrystalline silicon contacts

Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits

ST MICROELECTRONICS INC

Method of forming submicron contacts and vias in an integrated circuit

Semiconductor contact via structure

Method of forming submicron contacts and vias in an integrated circuit

Submicron contacts and vias in an integrated circuit

Method of producing an aluminum stacked contact/via for multilayer

Method of forming submicron contacts and vias in an integrated circuit

Method for forming an aluminum contact

Contacts for semiconductor devices

UNITED MICROELECTRONICS CORP

Package-free bonding pad structure

Method of fabricating load resistor

Method of manufacturing embedded dynamic random access memory

Plug structure

Method for fabricating a capacitor

Method of fabricating local interconnect

VOLTAFIELD TECHNOLOGY CORP

Magnatoresistive component and magnatoresistive device

LIOU FU-TAI

Magnetoresistance sensor and fabricating method thereof

VOLTAFIELD TECH CORP

Single-chip three-axis magnetic field sensing device

FU NAI-CHUNG

Magnatoresistive sensing component and agnatoresistive sensing device