Inventor

Dwivedi Shri Sagar

US23 patents

⚠️ This page may combine multiple inventors who share the name “Dwivedi Shri Sagar”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Dwivedi Shri Sagar

ADVANCED RISC MACH LTD

Read assist circuitry

Integrated circuit using discharging circuitries for bit lines

SRAM architecture with bitcells of varying speed and density

Redundancy schemes for memory cell repair

Dummy wordline design techniques

Redundancy schemes for memory

Write assist circuitry

Pulse stretcher circuitry

Bitline write assist circuitry

Column multiplexer circuitry

Column multiplexer circuitry

Pulse stretcher circuitry

Configurable multiplexing circuitry

Coupling compensation circuitry

Dummy bitline circuitry

Coupling compensation circuitry

Skewed corner tracking for memory write operations

High-speed memory architecture

Routing structures for memory applications

Dummy bitline circuitry

Integrated circuit using shaping and timing circuitries

Providing a discharge boundary using bitline discharge control circuitry for an integrated circuit

ARM LIMTED

Transition coupling circuitry for memory applications