Inventor
ROSE JAMES ALLEN
US5 patents
Patents
5 patentsUS6049867AApr 11, 2000
Method and system for multi-thread switching only when a cache miss occurs at a second or higher level
IBM110 citations95
US7284112B2Oct 16, 2007
Multiple page size address translation incorporating page size prediction
IBM35 citations90
US6314500B1Nov 6, 2001
Selective routing of data in a multi-level memory architecture based on source identification information
IBM28 citations89
US7739477B2Jun 15, 2010
Multiple page size address translation incorporating page size prediction
IBM5 citations71
US8028118B2Sep 27, 2011
Using an index value located on a page table to index page attributes
IBM0 citations40