Inventor
CHEN YINGWEN
CN5 patents
Patents
5 patentsUS9535782B2Jan 3, 2017
Method, apparatus and system for handling data error events with a memory controller
INTEL CORP7 citations79
US11080135B2Aug 3, 2021
Methods and apparatus to perform error detection and/or correction in a memory device
INTEL CORP4 citations71
US12073226B2Aug 27, 2024
Implementing external memory training at runtime
INTEL CORP0 citations60
US11281277B2Mar 22, 2022
Power management for partial cache line information storage between memories
INTEL CORP1 citations60
US11481294B2Oct 25, 2022
Runtime cell row replacement in a memory
INTEL CORP0 citations49