Inventor
MEMIS IRVING
US35 patents
⚠️ This page may combine multiple inventors who share the name “MEMIS IRVING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
26 patentsUS6069023AMay 30, 2000
Attaching heat sinks directly to flip chips and ceramic chip carriers
IBM115 citations97
US5847929ADec 8, 1998
Attaching heat sinks directly to flip chips and ceramic chip carriers
IBM164 citations97
US6664485B2Dec 16, 2003
Full additive process with filled plated through holes
IBM66 citations96
US6162997ADec 19, 2000
Circuit board with primary and secondary through holes
IBM64 citations96
US6251707B1Jun 26, 2001
Attaching heat sinks directly to flip chips and ceramic chip carriers
IBM63 citations94
US6391210B2May 21, 2002
Process for manufacturing a multi-layer circuit board
IBM17 citations93
US6650016B1Nov 18, 2003
Selective C4 connection in IC packaging
IBM23 citations92
US6418616B2Jul 16, 2002
Full additive process with filled plated through holes
IBM24 citations92
US6195883B1Mar 6, 2001
Full additive process with filled plated through holes
IBM37 citations92
US5532024AJul 2, 1996
Method for improving the adhesion of polymeric adhesives to nickel surfaces
IBM36 citations90
US5965944AOct 12, 1999
Printed circuit boards for mounting a semiconductor integrated circuit die
IBM27 citations89
US5414928AMay 16, 1995
Method of making an electronic package assembly with protective encapsulant material
IBM21 citations89
US5189261AFeb 23, 1993
Electrical and/or thermal interconnections and methods for obtaining such
IBM52 citations89
US4233620ANov 11, 1980
Sealing of integrated circuit modules
IBM29 citations81
US4048356ASep 13, 1977
Hermetic topsealant coating and process for its formation
IBM21 citations81
US7119003B2Oct 10, 2006
Extension of fatigue life for C4 solder ball to chip connection
IBM14 citations80
US7454833B2Nov 25, 2008
High performance chip carrier substrate
IBM6 citations74
US7214886B2May 8, 2007
High performance chip carrier substrate
IBM7 citations74
US6965170B2Nov 15, 2005
High wireability microvia substrate
IBM7 citations74
US6290860B1Sep 18, 2001
Process for design and manufacture of fine line circuits on planarized thin film dielectrics and circuits manufactured thereby
IBM7 citations74
US4971894ANov 20, 1990
Method and structure for preventing wet etchant penetration at the interface between a resist mask and an underlying metal layer
IBM8 citations66
US7863526B2Jan 4, 2011
High performance chip carrier substrate
IBM2 citations63
US7279798B2Oct 9, 2007
High wireability microvia substrate
IBM2 citations63
US6919635B2Jul 19, 2005
High density microvia substrate with high wireability
IBM4 citations63
US7886435B2Feb 15, 2011
High performance chip carrier substrate
IBM0 citations52
US7067916B2Jun 27, 2006
Extension of fatigue life for C4 solder ball to chip connection
IBM0 citations48
ENDICOTT INTERCONNECT TECH INC
8 patentsUS7470990B2Dec 30, 2008
Low moisture absorptive circuitized substrate with reduced thermal expansion, method of making same, electrical assembly utilizing same, and information handling system utilizing same
ENDICOTT INTERCONNECT TECH INC16 citations92
US7294791B2Nov 13, 2007
Circuitized substrate with improved impedance control circuitry, method of making same, electrical assembly and information handling system utilizing same
ENDICOTT INTERCONNECT TECH INC30 citations89
US7791897B2Sep 7, 2010
Multi-layer embedded capacitance and resistance substrate core
ENDICOTT INTERCONNECT TECH INC15 citations84
US7589283B2Sep 15, 2009
Method of making circuitized substrate with improved impedance control circuitry, electrical assembly and information handling system
ENDICOTT INTERCONNECT TECH INC12 citations81
US7416972B2Aug 26, 2008
Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion
ENDICOTT INTERCONNECT TECH INC6 citations74
US7145221B2Dec 5, 2006
Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same
ENDICOTT INTERCONNECT TECH INC10 citations74
US7622384B2Nov 24, 2009
Method of making multi-chip electronic package with reduced line skew
ENDICOTT INTERCONNECT TECH INC4 citations63
US7332818B2Feb 19, 2008
Multi-chip electronic package with reduced line skew and circuitized substrate for use therein
ENDICOTT INTERCONNECT TECH INC4 citations63