Inventor

ODA HIDEKAZU

JP76 patents

⚠️ This page may combine multiple inventors who share the name “ODA HIDEKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ODA HIDEKAZU

MITSUBISHI ELECTRIC CORP

MIS transistor and manufacturing method thereof

Semiconductor device having a buried-channel MOS structure

Semiconductor device and method of fabricating the same

Semiconductor device with a silicide layer

Buried-channel semiconductor device, and manufacturing method thereof

Semiconductor device and method of fabricating the same

Method of forming a layered wiring structure including titanium silicide

Field effect transistor and method of manufacturing same

Manufacturing method of a semiconductor device with a silicide layer

Semiconductor device with doped contact impurity regions having particular doping levels

Semiconductor device having a wiring layer including a TISI2, film of the C49 or C54 structure

Semiconductor device manufacturing method

Semiconductor MOSFET device having a shallow nitrogen implanted channel region

Dynamic random access memory device and method of manufacturing

Semiconductor device

Semiconductor device and method of manufacturing the same

MIS transistor and method of fabricating the same

EEPROM with high channel hot carrier injection efficiency

Method of manufacturing MISFET

Method of manufacturing a semiconductor device having a lightly doped contact impurity region surrounding a highly doped contact impurity region

Semiconductor device with nitrogen implanted channel region

Semiconductor integrated circuit having silicided elements of short length

Process for manufacturing stacked semiconductor devices

Semiconductor device and manufacturing method thereof

MIS transistor and manufacturing method thereof

Silicide layer forming method and semiconductor integrated circuit

Memory cell evaluation semiconductor device, method of fabricating the same and memory cell evaluation method

Semiconductor device having internal wire and method of fabricating the same

RENESAS ELECTRONICS CORP

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device and manufacturing method of the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device having a field effect transistor formed on a silicon-on-insulator substrate and manufacturing method thereof

Method of manufacturing semiconductor device with offset sidewall structure

RENESAS TECH CORP

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device and manufacturing method thereof

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Manufacturing method of semiconductor device

Heterojunction semiconductor device with element isolation structure

Method of manufacturing semiconductor device having gate electrode with expanded upper portion