Inventor

MOORE BRADLEY T

US64 patents

⚠️ This page may combine multiple inventors who share the name “MOORE BRADLEY T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOORE BRADLEY T

ADVANCED MICRO DEVICES INC

Method and apparatus for in situ anneal during ion implant

Method of making NMOS and PMOS devices with reduced masking steps

Transistor with buried insulative layer beneath the channel region

Method of channel doping using diffusion from implanted polysilicon

Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric

Multiple split gate semiconductor device and fabrication method

Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion

Trench transistor with insulative spacers

Method of making an IGFET with a multilevel gate

Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device

Reticle that compensates for radiation-induced lens error in a photolithographic system

Individually controllable radiation sources for providing an image pattern in a photolithographic system

Method of forming a shallow junction by diffusion from a silicon-based spacer

Tri-level segmented control transistor and fabrication method

Photolithographic system including light filter that compensates for lens error

Dopant diffusion-retarding barrier region formed within polysilicon gate layer

Method of making an IGFET with elevated source/drain regions in close proximity to gate with sloped sidewalls

Method of forming an insulated-gate field-effect transistor with metal spacers

System and apparatus for in situ monitoring and control of annealing in semiconductor fabrication

Integrated circuit having an interlevel interconnect coupled to a source/drain region(s) with source/drain region(s) boundary overlap and reduced parasitic capacitance

Method of forming trench transistor with insulative spacers

Compact transistor structure with adjacent trench isolation and source/drain regions implanted vertically into trench walls

Ion implantation into a gate electrode layer using an implant profile displacement layer

Semiconductor fabrication method of combining a plurality of fields defined by a reticle image using segment stitching

Method of stitching segments defined by adjacent image patterns during the manufacture of a semiconductor device

Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device

Trench transistor with metal spacers

Method for forming an IGFET with silicide source/drain contacts in close proximity to a gate with sloped sidewalls

Method of making an igfet with selectively doped multilevel polysilicon gate

IGFET method of forming with silicide contact on ultra-thin gate

Semiconductor fabrication method of forming a master layer to combine individually printed blocks of a circuit pattern

Method of making NMOS and devices with sequentially formed gates having different gate lengths

Method of forming trench transistor with metal spacers

Implanted barrier layer for retarding upward diffusion of substrate dopant

Method of forming an insulated-gate field-effect transistor with metal spacers

Method of forming a local interconnect by conductive layer patterning

Method of fabricating an integrated circuit having devices arranged with different device densities using a bias differential to form devices with a uniform size

Inspection of lens error associated with lens heating in a photolithographic system

Method for manufacturing a non-volatile, virtual ground memory element

IBM

Detecting and tracking virtual containers

Software component configuration identification

Software signature discovery

Detecting and tracking virtual containers

HEATHCO LLC

Electrical fixture secured to a junction box via a cover plate having an electrical connector

Electrical fixture secured to a junction box via a cover plate having an electrical connector

Mounting strap having a connector to connect an electric fixture to a junction box

DEPUY ACROMED INC

Spinal implant

MOTOROLA INC

Miller loop compensation network with capacitive drive

SAMSUNG AUSTIN SEMICONDUCTOR

Methods to improve density and uniformity of hemispherical grain silicon layers

SERVICENOW INC

Detecting and tracking virtual containers