Inventor

RETTER ERIC E

US59 patents

⚠️ This page may combine multiple inventors who share the name “RETTER ERIC E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RETTER ERIC E

IBM

Systems and methods for memory module power management

SIMD/MIMD processing memory element (PME)

Advanced parallel array processor(APAP)

Advanced parallel array processor I/O connection

Dynamically adjusting read data return sizes based on memory interface bus utilization

High bandwidth data transfer employing a multi-mode, shared line buffer

Synchronization and order detection in a memory system

Provision of early data from a lower level cache memory

Address mapping including generic bits for universal addressing independent of memory type

Transient condition management utilizing a posted error detection processing protocol

System to improve memory failure management and associated methods

Dual asynchronous and synchronous memory system

Dual asynchronous and synchronous memory system

Pre-arbitration request limiter for an integrated multi-master bus system

Dynamically adjusting read data return sizes based on interconnect bus utilization

Switching a defective signal line with a spare signal line without shutting down the computer system

Synchronization and order detection in a memory system

Modification of prefetch depth based on high latency event

Real time clock circuit having an internal clock generator

Real time clock circuit having an internal clock generator

Dynamic reservations in a unified request queue

Performing arithmetic operations using both large and small floating point values

Switching a defective signal line with a spare signal line without shutting down the computer system

Modification of prefetch depth based on high latency event

Provision of early data from a lower level cache memory

Tagging in memory control unit (MCU)

Memory reorder queue biasing preceding high latency operations

Method, system and synchronization circuit for providing hardware component access to a set of data values without restriction

Selective posted data error detection based on history

Dynamically adjusting read data return sizes based on interconnect bus utilization

Apparatus and method for synchronizing multiple circuits clocked at a divided phase locked loop frequency

Dynamically allocating memory controller resources for extended prefetching

Synchronization and order detection in a memory system

Transient condition management utilizing a posted error detection processing protocol

Scalable data collection for system management

GLOBALFOUNDRIES INC

ECC bypass using low latency CE correction with retry select signal

ECC bypass using low latency CE correction with retry select signal

LASTRAS-MONTANO LUIS A

System for error decoding with retries and associated methods

System to improve error correction using variable latency and associated methods

FRY RICHARD E

Implementing enhanced memory reliability using memory scrub operations

Computer system and method of protection for the system&#39;s marking store

BRITTAIN MARK A

Memory queue handling techniques for reducing impact of high-latency memory operations

Memory reorder queue biasing preceding high latency operations

CARTER JOHN B

Performing arithmetic operations using both large and small floating point values

Performing arithmetic operations using both large and small floating point values

BUCHMANN PETER L

Power-on initialization and test for a cascade interconnect memory system

CANTIN JASON F

Access speculation predictor with predictions based on memory region prior requestor tag information

O'CONNOR JAMES A

Methods, systems, and computer program products for dynamic selective memory mirroring

NICHOLAS RICHARD

Access speculation predictor with predictions based on a scope predictor

BAYSAH IRVING G

System to improve miscorrection rates in error control code through buffering and associated methods

Computer system and method of protection for the system's marking store