Inventor · disambiguated record
Tai-Yu Cheng
Also filed as: Cheng tai-yu
8 granted patents·1 pending application·7 citations·filing 2016–2024
78Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD9
Top patents by PatentIndex Score
9 records- 0190US10157840B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 18, 2018·5 cites·20 claims
- 0286US2024387373A1Integrated Circuit Having a High Cell DensityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0379US12087690B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 10, 2024·0 cites·20 claims
- 0478US10678989B2Method and system for sigma-based timing optimizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 9, 2020·2 cites·20 claims
- 0572US11437319B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 6, 2022·0 cites·20 claims
- 0662US11176305B2Method and system for sigma-based timing optimizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 16, 2021·0 cites·20 claims
- 0761US10804200B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Oct 13, 2020·0 cites·20 claims
- 0845US10176284B2Semiconductor circuit design and manufacture methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 8, 2019·0 cites·20 claims
- 0942US10515166B2Method of timing analysisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 24, 2019·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →