Inventor

ILKBAHAR ALPER

US56 patents

⚠️ This page may combine multiple inventors who share the name “ILKBAHAR ALPER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ILKBAHAR ALPER

INTEL CORP

Slew rate control

System utilizing distributed on-chip termination

Method and apparatus for slew rate and impedance compensating buffer circuits

Computer system with a semi-differential bus signaling scheme

Slew rate control

Method and apparatus for buffer self-test and characterization

Opportunistic time-borrowing domino logic

Method and apparatus to structurally detect random defects that impact AC I/O timings in an input/output buffer

System for protecting strobe glitches by separating a strobe signal into pointer path and timing path, filtering glitches from signals on pointer path thereof

Method and apparatus for glitch protection for input buffers in a source-synchronous environment

Multiple synthesizer based timing signal generation scheme

Method and apparatus for testing compensated buffer circuits

Method and apparatus for glitch protection for input buffers in a source-synchronous environment

Method and apparatus for controlling compensated buffers

Pulse controlled impedance compensated output buffer

Method and apparatus for measuring internal clock skew

Power failure safe computer architecture

Predriver logic circuit

Method and apparatus for source synchronous transfers at frequencies including an odd fraction of a core frequency

Method and apparatus for providing controllable compensation factors to a compensated driver circuit which may be used to perform testing of the structural integrity of the compensated driver circuit

Arrangements for self-measurement of I/O timing

Method and apparatus for electro-static discharge protection

Parallel terminated bus system

Method and apparatus for integrated circuit power up

MATRIX SEMICONDUCTOR INC

NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same

Method for fabricating programmable memory array structures incorporating series-connected transistor strings

Semiconductor device with localized charge storage dielectric and method of making same

High density 3D rail stack arrays

Integrated systems using vertically-stacked three-dimensional memory cells

Redundant memory structure using bad bit pointers

Memory device and method for dynamic bit inversion

Redundant memory structure using bad bit pointers

High density 3d rail stack arrays and method of making

Memory device and method for storing bits in non-adjacent storage locations in a memory array

Array containing charge storage and dummy transistors and method of operating the array

SANDISK 3D LLC

Three-dimensional memory device incorporating segmented bit line memory array

NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same

Memory device and method for redundancy/self-repair

NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

System architecture and method for three-dimensional memory

Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information

Semiconductor device with localized charge storage dielectric and method of making same

Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information

SCHEUERLEIN ROY E

Three-dimensional memory device incorporating segmented array line memory array

Memory cell that includes a carbon-based memory element and methods of forming the same

Memory cell that includes a carbon-based memory element and methods of forming the same

Three-dimensional memory device incorporating segmented array line memory array

ERICSSON TELEFON AB L M

System and method for dial-up networking over infrared data link

SANDISK TECHNOLOGIES LLC

Volatile memory device employing a resistive memory element