Inventor

VENKATA RAMANAND

US52 patents

⚠️ This page may combine multiple inventors who share the name “VENKATA RAMANAND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VENKATA RAMANAND

ALTERA CORP

Programmable logic devices with multi-standard byte synchronization and channel alignment for communication

Clock data recovery with double edge clocking based phase detector and serializer/deserializer

Byte alignment for serial data receiver

Byte alignment circuitry

Multi-standard clock rate matching circuitry

Multi-channel synchronization for programmable logic device serial interface

Clock signal circuitry for multi-protocol high-speed serial interface circuitry

Multiple transmit data rates in programmable logic device serial interface

Multiple data rates in programmable logic device serial interface

Programmable logic device serial interface having dual-use phase-locked loop circuitry

Digital phase locked loop circuitry and methods

Byte alignment for serial data receiver

Selectable dynamic reconfiguration of programmable embedded IP

Clock grid for integrated circuit

Transceiver circuitry with multiple phase-locked loops

Serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits

Circuitry for padded communication protocols

Programmable PPM detector

Digital phase locked loop circuitry and methods

Next generation 8B10B architecture

Next generation 8B10B architecture

Data converter with multiple conversions for padded-protocol interface

Byte alignment circuitry

Programmable logic devices with multi-standard byte synchronization and channel alignment for communication

Configurable clock grid structures

Selectable dynamic reconfiguration of programmable embedded IP

Configuration via high speed serial link

Configuration via high speed serial link

Clock grid for integrated circuit

Multiple data rates in integrated circuit device serial interface

Multi-channel communication circuitry for programmable logic device integrated circuits and the like

Programmable logic device with serial interconnect

Multiple data rates in programmable logic device serial interface

Serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits

Deserializer circuitry for high-speed serial data receivers on programmable logic device integrated circuits

Byte alignment for serial data receiver

Clock grid for integrated circuit

Digital phase locked loop circuitry and methods

Techniques for providing clock signals in an integrated circuit

Digital phase locked loop circuitry and methods

Programmable logic devices with multi-standard byte synchronization and channel alignment for communication

Dynamic special character selection for use in byte alignment circuitry

Clock signal circuitry for multi-protocol high-speed serial interface circuitry

VENKATA RAMANAND

Apparatus and methods for low-skew channel bonding

Techniques for aligning and reducing skew in serial data signals

Integrated circuits with clock selection circuitry

Digital phase locked loop circuitry and methods

NGUYEN TOAN THANH

Serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits

ZALIZNYAK ARCH

Apparatus and methods for serial interfaces with shared datapaths

MARURI VICTOR

Techniques for providing clock signals in clock networks