Inventor

LEIPOLD DIRK

US74 patents

⚠️ This page may combine multiple inventors who share the name “LEIPOLD DIRK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEIPOLD DIRK

TEXAS INSTRUMENTS INC

Digital fractional phase detector

Digital, down-converted RF residual leakage signal mitigating RF residual leakage

Gain calibration of a digital controlled oscillator

Integrated circuit incorporating RF antenna switch and power amplifier

Digitally-controlled L-C oscillator

Multi-band low noise amplifier system

Hybrid of predictive and closed-loop phase-domain digital PLL architecture

System and method for time dithering a digitally-controlled oscillator tuning input

Type-II all-digital phase-locked loop (PLL)

Frequency synthesizer with digitally-controlled oscillator

Frequency synthesizer with digitally-controlled oscillator

Frequency synthesizer

Digital phase-domain PLL frequency synthesizer

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Predistortion calibration in a transceiver assembly

All-digital frequency synthesis with non-linear differential term for handling frequency perturbations

Time-to-digital converter with non-inverting buffers, transmission gates and non-linearity corrector, SOC including such converter and method of phase detection for use in synthesizing a clock signal

Sigma-delta (ΣΔ) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer

Efficient charge transfer using a switched capacitor resistor

Power saving circuitry using predictive logic

All-digital frequency synthesis with DCO gain calculation

RF A/D converter with phased feedback to low noise amplifier

Power amplifier

Efficient pulse amplitude modulation transmit modulation

Direct radio frequency (RF) sampling with recursive filtering method

On-chip receiver sensitivity test mechanism

Sampling mixer with asynchronous clock and signal domains

First and second phase detectors and phase offset adder PLL

Parallel redundant single-electron device and method of manufacture

Methods and apparatus to provide an auxiliary receive path to support transmitter functions

Offset balancer, method of balancing an offset and a wireless receiver employing the balancer and the method

Gain calibration of a digital controlled oscillator

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Type-II all-digital phase-locked loop (PLL)

Subsampling communication receiver architecture with gain control and RSSI generation

Subsampling communication receiver architecture with relaxed IFA readout timing

Method of defining semiconductor fabrication process utilizing transistor inverter delay period

System and method for implementing transformer on package substrate

On-chip receiver sensitivity test mechanism

Method and apparatus for digital amplitude and phase modulation

Wireless communications device having type-II all-digital phase-locked loop (PLL)

Spread spectrum demodulation using a subsampling communication receiver architecture

Removing close-in interferers through a feedback loop

STASZEWSKI ROBERT B

Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing

Fine-grained gear-shifting of a digital phase-locked loop (PLL)

All-digital frequency synthesis with DCO gain calculation

Digital amplitude modulation

Radio frequency built-in self test for quality monitoring of local oscillator and transmitter

LEIPOLD DIRK

Direct DC coupled push-pull BJT driver for power amplifier with built-in gain and bias current signal dependent expansion

Switched inductor DC-DC converter