Inventor
GREENE BRIAN
US20 patents
⚠️ This page may combine multiple inventors who share the name “GREENE BRIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
12 patentsUS12507475B2Dec 23, 2025
Substrate-less lateral diode integrated circuit structures
INTEL CORP0 citations61
US12328947B2Jun 10, 2025
Substrate-less silicon controlled rectifier (SCR) integrated circuit structures
INTEL CORP0 citations61
US12166031B2Dec 10, 2024
Substrate-less electrostatic discharge (ESD) integrated circuit structures
INTEL CORP1 citations61
US12501661B2Dec 16, 2025
Integrated circuit structures having differentiated channel sizing
INTEL CORP0 citations60
US12317590B2May 27, 2025
Substrate-free integrated circuit structures
INTEL CORP0 citations60
US11869987B2Jan 9, 2024
Gate-all-around integrated circuit structures including varactors
INTEL CORP0 citations60
US11417781B2Aug 16, 2022
Gate-all-around integrated circuit structures including varactors
INTEL CORP0 citations60
US12471354B2Nov 11, 2025
Dipole threshold voltage tuning for high voltage transistor stacks
INTEL CORP1 citations58
US12154898B2Nov 26, 2024
Substrate-less vertical diode integrated circuit structures
INTEL CORP0 citations58
US12563810B1Feb 24, 2026
Selective backside recessing of source and drain regions
INTEL CORP0 citations57
US12568643B2Mar 3, 2026
Nanowire transistors and methods of fabrication
INTEL CORP0 citations48
US12543367B2Feb 3, 2026
Backside processing of fins in fin based transistor devices
INTEL CORP0 citations45
GLOBALFOUNDRIES INC
6 patentsUS10269932B1Apr 23, 2019
Asymmetric formation of epi semiconductor material in source/drain regions of FinFET devices
GLOBALFOUNDRIES INC42 citations91
US9780002B1Oct 3, 2017
Threshold voltage and well implantation method for semiconductor devices
GLOBALFOUNDRIES INC2 citations72
US10867912B2Dec 15, 2020
Dummy fill scheme for use with passive devices
GLOBALFOUNDRIES INC0 citations48
US10790204B2Sep 29, 2020
Test structure leveraging the lowest metallization level of an interconnect structure
GLOBALFOUNDRIES INC0 citations47
US10566411B2Feb 18, 2020
On-chip resistors with direct wiring connections
GLOBALFOUNDRIES INC0 citations41
US10796973B2Oct 6, 2020
Test structures connected with the lowest metallization levels in an interconnect structure
GLOBALFOUNDRIES INC0 citations36