Inventor
MA QINGTIAN
CN3 patents
Patents
3 patentsUS8367554B2Feb 5, 2013
Methods for forming a gate and a shallow trench isolation region and for planarizing an etched surface of silicon substrate
SEMICONDUCTOR MFG INT SHANGHAI2 citations59
US8377827B2Feb 19, 2013
Methods for forming a gate and a shallow trench isolation region and for planarizing an etched surface of silicon substrate
SEMICONDUCTOR MFG INT SHANGHAI0 citations48
US8039402B2Oct 18, 2011
Methods for forming a gate and a shallow trench isolation region and for planarizating an etched surface of silicon substrate
SEMICONDUCTOR MFG INT SHANGHAI0 citations48