Inventor

LEE WEI-YANG

TW210 patents

⚠️ This page may combine multiple inventors who share the name “LEE WEI-YANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE WEI-YANG

TAIWAN SEMICONDUCTOR MFG CO LTD

FinFET and method for manufacturing the same

Semiconductor structure with blocking layer and method for forming the same

Semiconductor device with air-spacer

Semiconductor device and manufacturing method thereof

Method for semiconductor device fabrication with improved source drain epitaxy

FinFET and method of manufacturing the same

Integrated circuit structure with backside dielectric layer having air gap

Inner spacer liner

Methods of reducing parasitic capacitance in multi-gate field-effect transistors

FinFET structure with airgap and method of forming the same

Semiconductor device with funnel shape spacer and methods of forming the same

Methods of forming epitaxial structures in fin-like field effect transistors

Integrated circuit device with source/drain barrier

Formation of dislocations in source and drain regions of FinFET devices

Semiconductor device and manufacturing method thereof

Formation of dislocations in source and drain regions of FinFET devices

Semiconductor substructure having elevated strain material-sidewall interface and method of making the same

Low-K dielectric sidewall spacer treatment

Semiconductor device and methods of manufacture

Semiconductor device with backside contact and methods of forming such

Semiconductor device active region profile and method of forming the same

Inner spacer liner

Structure and formation method of semiconductor device with backside contact

Air spacer for a gate structure of a transistor

Nano-FET semiconductor device and method of forming

Semiconductor structure with gate-all-around devices and stacked FinFET devices

Semiconductor devices and methods of manufacture

Air gap formation between gate spacer and epitaxy structure

Backside contact with air spacer

FinFET structure with airgap and method of forming the same

Methods of forming metal gate spacer

Epitaxial source/drain feature with enlarged lower section interfacing with backside via

Semiconductor device and method of manufacture

Semiconductor device active region profile and method of forming the same

Method for forming different types of devices

Air gap formation between gate spacer and epitaxy structure

Integrated circuit structure with backside dielectric layer having air gap

Semiconductor devices including backside vias and methods of forming the same

Method and structure for air gap inner spacer in gate-all-around devices

Semiconductor device and method

Method for epitaxial growth and device

Semiconductor device with air-spacer

Semiconductor device and manufacturing method thereof

Integrated circuit device with source/drain barrier

TAIWAN SEMICONDUCTOR MFG

Formation of dislocations in source and drain regions of FinFET devices

Method to form a semiconductor device having gate dielectric layers of varying thicknesses

Source/drain structure of semiconductor device

CHEN JIAN-HAO

Method of fabricating a plurality of gate structures

LEE DA-YUAN

Method of fabricating high-k/metal gate device

HSU KUANG-YUAN

Method to form a semiconductor device having gate dielectric layers of varying thickness