Inventor

CHEN YEN-MING

TW306 patents

⚠️ This page may combine multiple inventors who share the name “CHEN YEN-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN YEN-MING

TAIWAN SEMICONDUCTOR MFG CO LTD

Multiple gate field-effect transistors having oxygen-scavenged gate stack

Semiconductor device with air-spacer

Self-aligned gate hard mask and method forming same

Methods for reducing contact resistance in semiconductors manufacturing process

Replacement gate process for FinFET

Static random access memory and method of manufacturing the same

Method of forming semiconductor structure with anti-punch through structure

Semiconductor device with self-aligned wavy contact profile and method of forming the same

Multi-layer passivation structure and method

Chip structure and method for forming the same

Semiconductor device with self-aligned wavy contact profile and method of forming the same

Methods of reducing parasitic capacitance in multi-gate field-effect transistors

Flexible merge scheme for source/drain epitaxy regions

Self-aligned contact air gap formation

Semiconductor device with funnel shape spacer and methods of forming the same

Pattern fidelity enhancement with directional patterning technology

Semiconductor device with epitaxial source/drain

Flexible merge scheme for source/drain epitaxy regions

Fin field effect transistor (FinFET) device structure with dummy fin structure and method for forming the same

Source and drain formation technique for fin-like field effect transistor

Methods of forming epitaxial structures in fin-like field effect transistors

Flexible merge scheme for source/drain epitaxy regions

Replacement gate process for FinFET

Semiconductor structure and method for forming the same

Conformal transfer doping method for fin-like field effect transistor

Integrated circuit device with source/drain barrier

Replacement gate process for FinFET

TAIWAN SEMICONDUCTOR MFG

Bumping process to increase bump height and to create a more robust bump structure

Colors only process to reduce package yield loss

Method to form bump in bumping technology

Method of making a wafer level chip scale package

Method for improving bump reliability for flip chip devices

Method to form a color image sensor cell while protecting the bonding pad structure from damage

Method for manufacturing arch air gap in multilevel interconnection

Method of manufacturing air gap in multilevel interconnection

Method of manufacturing self-aligned T-shaped gate through dual damascene

Method for fabricating fully dielectric isolated silicon (FDIS)

Bumping process to increase bump height and to create a more robust bump structure

Method to form very a fine pitch solder bump using methods of electroplating

Colors only process to reduce package yield loss

Dual layer photoresist method for fabricating a mushroom bumping plating structure

Method of measuring photoresist and bump misalignment

Method to improve reliability for flip-chip device for limiting pad design

Method of forming a bump on a copper pad

Method for under bump metal patterning of bumping process

Method to form polysilicon resistors shielded from hydrogen intrusion

TSAI MING-HUAN

Source and drain feature profile for improving device performance and method of manufacturing same

CHEN YEN MING

Pressure indicating device for indicating clogging condition of a filter

HSU CHUN-WEI

Semiconductor device

YIN JIN-MU

Fabrication methods of integrated semiconductor structure