Inventor
GREINER ROBERT J
US42 patents
⚠️ This page may combine multiple inventors who share the name “GREINER ROBERT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
34 patentsUS6601121B2Jul 29, 2003
Quad pumped bus architecture and protocol
INTEL CORP104 citations99
US6609171B1Aug 19, 2003
Quad pumped bus architecture and protocol
INTEL CORP34 citations96
US6732242B2May 4, 2004
External bus transaction scheduling system
INTEL CORP63 citations95
US6708269B1Mar 16, 2004
Method and apparatus for multi-mode fencing in a microprocessor system
INTEL CORP62 citations94
US6907487B2Jun 14, 2005
Enhanced highly pipelined bus architecture
INTEL CORP22 citations93
US6880031B2Apr 12, 2005
Snoop phase in a highly pipelined bus architecture
INTEL CORP18 citations93
US6807592B2Oct 19, 2004
Quad pumped bus architecture and protocol
INTEL CORP16 citations93
US6804735B2Oct 12, 2004
Response and data phases in a highly pipelined bus architecture
INTEL CORP21 citations93
US6505262B1Jan 7, 2003
Glitch protection and detection for strobed data
INTEL CORP17 citations93
US7770005B2Aug 3, 2010
Launching a secure kernel in a multiprocessor system
INTEL CORP8 citations92
US7685441B2Mar 23, 2010
Power control unit with digitally supplied system parameters
INTEL CORP16 citations90
US7414383B2Aug 19, 2008
Multi-phase voltage regulator with phases ordered by lowest phase current
INTEL CORP33 citations90
US6434650B1Aug 13, 2002
Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor
INTEL CORP31 citations88
US9779249B2Oct 3, 2017
Launching a secure kernel in a multiprocessor system
INTEL CORP5 citations84
US8037326B2Oct 11, 2011
Power control unit with digitally supplied system parameters
INTEL CORP7 citations82
US7996572B2Aug 9, 2011
Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
INTEL CORP16 citations82
US7642764B2Jan 5, 2010
Voltage regulator with loadline based mostly on dynamic current
INTEL CORP15 citations82
US6880076B2Apr 12, 2005
System and method for communicating device information between a device and a controller
INTEL CORP18 citations81
US8935546B2Jan 13, 2015
Dynamic voltage transitions
INTEL CORP11 citations80
US7761723B2Jul 20, 2010
Processor temperature control interface
INTEL CORP11 citations80
US7774600B2Aug 10, 2010
Launching a secure kernel in a multiprocessor system
INTEL CORP2 citations74
US7725713B2May 25, 2010
Launching a secure kernel in a multiprocessor system
INTEL CORP3 citations74
US7698552B2Apr 13, 2010
Launching a secure kernel in a multiprocessor system
INTEL CORP7 citations74
US6742160B2May 25, 2004
Checkerboard parity techniques for a multi-pumped bus
INTEL CORP10 citations74
US6591319B2Jul 8, 2003
Glitch protection and detection for strobed data
INTEL CORP10 citations74
US6446154B1Sep 3, 2002
Method and mechanism for virtualizing legacy sideband signals in a hub interface architecture
INTEL CORP7 citations74
US6957352B2Oct 18, 2005
Processor temperature control interface
INTEL CORP7 citations70
US9213865B2Dec 15, 2015
Launching a secure kernel in a multiprocessor system
INTEL CORP1 citations63
US7783809B2Aug 24, 2010
Virtualization of pin functionality in a point-to-point interface
INTEL CORP2 citations62
US7449966B2Nov 11, 2008
Method and an apparatus to sense supply voltage
INTEL CORP2 citations62
US9507952B2Nov 29, 2016
Launching a secure kernel in a multiprocessor system
INTEL CORP0 citations52
US9003210B2Apr 7, 2015
Dynamic voltage transitions
INTEL CORP0 citations52
US7757081B2Jul 13, 2010
Launching a secure kernel in a multiprocessor system
INTEL CORP0 citations52
US8874906B2Oct 28, 2014
Launching a secure kernel in a multiprocessor system
INTEL CORP0 citations50
WILSON JOHN H
3 patentsUS8161280B2Apr 17, 2012
Launching a secure kernel in a multiprocessor system
WILSON JOHN H8 citations91
US8464048B2Jun 11, 2013
Launching a secure kernel in a multiprocessor system
WILSON JOHN H0 citations51
US8250364B2Aug 21, 2012
Launching a secure kernel in a multiprocessor system
WILSON JOHN H0 citations51