Inventor

TSAI NIEN-YU

TW21 patents

⚠️ This page may combine multiple inventors who share the name “TSAI NIEN-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAI NIEN-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Method and system of determining colorability of a layout

Standard cell and semiconductor device including anchor nodes and method of making

Standard cell and semiconductor device including anchor nodes

Method of designing a semiconductor device, system for implementing the method and standard cell

Multi-patterning graph reduction and checking flow method

Standard cell and semiconductor device including anchor nodes

Integrated circuit device and method

Standard cell and semiconductor device including anchor nodes and method of making

Multi-patterning graph reduction and checking flow method

Multi-patterning graph reduction and checking flow method

DRC format for stacked CMOS design

Methods of manufacturing a semiconductor device

PROMOS TECHNOLOGIES INC

Method of forming tungsten interconnect with tungsten oxidation to prevent tungsten loss

Method of forming tungsten interconnect and vias without tungsten loss during wet stripping of photoresist polymer

Method for etching a trench through an anti-reflective coating

Etching method for reducing bit line coupling in a DRAM

Method of forming shallow trench

Method of planarizing spin-on material layer and manufacturing photoresist layer

PROMOS TECHNOLOGY INC

Deep trench bottle-shaped etching using Cl2 gas

Deep trench bottle-shaped etch in centura mark II NG

TSAI NIEN-YU

Semiconductor hole structure