Inventor

GREENHALGH PETER RICHARD

GB32 patents

⚠️ This page may combine multiple inventors who share the name “GREENHALGH PETER RICHARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GREENHALGH PETER RICHARD

ADVANCED RISC MACH LTD

Apparatus and method for controlling allocation of data into a cache storage

Instruction prefetch throttling using instruction count and branch prediction

Branch target address provision

Data processing apparatus and method for handling instructions to be executed by processing circuitry

Flushing control within a multi-threaded processor

Data processing apparatus and method for transferring workload between source and destination processing circuitry

Apparatus and method for controlling allocation of instructions into an instruction cache storage

Instruction pre-decoding of multiple instruction sets

Data processing apparatus and method for handling instructions to be executed by processing circuitry

Speculative side-channel hint instruction

Improving the responsiveness of an apparatus to certain interrupts

Data processing apparatus and method for pre-decoding instructions

Data processing apparatus and method for identifying sequences of instructions

Controlling use of data determined by a resolve-pending speculative operation

Encoding of input to storage circuitry

Mode switching in dependence upon a number of active threads

Apparatus and method for predicting source operand values and optimized processing of instructions

Processing pipeline with first and second processing modes having different performance or energy consumption characteristics

Tracking speculative data caching

Apparatus and method for prefetching data items

Cache control in presence of speculative read operations

Apparatus and branch prediction circuitry having first and second branch prediction schemes, and method

Allowing deletion of a dispatched instruction from an instruction queue when sufficient processor resources are predicted for that instruction

Data processing apparatus and method for pre-decoding instructions to be executed by processing circuitry

Data processing apparatus and method for instruction pre-decoding

Determining a predicted behaviour for processing of instructions

Controlling execution of instructions for a processing pipeline having first out-of order execution circuitry and second execution circuitry

Processor and method for processing instructions using at least one processing pipeline

Pre-decode checking for pre-decoded instructions that cross cache line boundaries

GREENHALGH PETER RICHARD

Data processing apparatus and method for transferring workload between source and destination processing circuitry

Virtualization software migrating workload between processing circuitries while making architectural states available transparent to operating system

Reducing errors in pre-decode caches