Inventor
FAHS BRIAN
US36 patents
⚠️ This page may combine multiple inventors who share the name “FAHS BRIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NVIDIA CORP
25 patentsUS9424201B2Aug 23, 2016
Migrating pages of different sizes between heterogeneous processors
NVIDIA CORP10 citations84
US9639474B2May 2, 2017
Migration of peer-mapped memory pages
NVIDIA CORP11 citations83
US9575892B2Feb 21, 2017
Replaying memory transactions while resolving memory access faults
NVIDIA CORP8 citations83
US9348762B2May 24, 2016
Technique for accessing content-addressable memory
NVIDIA CORP9 citations83
US11210253B2Dec 28, 2021
PCIe traffic tracking hardware in a unified virtual memory system
NVIDIA CORP1 citations73
US10409730B2Sep 10, 2019
Microcontroller for memory management unit
NVIDIA CORP3 citations73
US10133677B2Nov 20, 2018
Opportunistic migration of memory pages in a unified virtual memory system
NVIDIA CORP2 citations73
US9940286B2Apr 10, 2018
PCIE traffic tracking hardware in a unified virtual memory system
NVIDIA CORP4 citations73
US9830197B2Nov 28, 2017
Cooperative thread array reduction and scan operations
NVIDIA CORP2 citations73
US9830262B2Nov 28, 2017
Access tracking mechanism for hybrid memories in a unified virtual system
NVIDIA CORP3 citations73
US9830210B2Nov 28, 2017
CPU-to-GPU and GPU-to-GPU atomics
NVIDIA CORP3 citations73
US9798487B2Oct 24, 2017
Migrating pages of different sizes between heterogeneous processors
NVIDIA CORP3 citations73
US9792220B2Oct 17, 2017
Microcontroller for memory management unit
NVIDIA CORP5 citations73
US10310973B2Jun 4, 2019
Efficient memory virtualization in multi-threaded processing units
NVIDIA CORP5 citations72
US10169091B2Jan 1, 2019
Efficient memory virtualization in multi-threaded processing units
NVIDIA CORP4 citations72
US10037228B2Jul 31, 2018
Efficient memory virtualization in multi-threaded processing units
NVIDIA CORP6 citations72
US9417875B2Aug 16, 2016
Cooperative thread array reduction and scan operations
NVIDIA CORP1 citations63
US9355041B2May 31, 2016
Frame buffer access tracking via a sliding window in a unified virtual memory system
NVIDIA CORP2 citations62
US10061526B2Aug 28, 2018
Frame buffer access tracking via a sliding window in a unified virtual memory system
NVIDIA CORP0 citations52
US10216413B2Feb 26, 2019
Migration of peer-mapped memory pages
NVIDIA CORP0 citations51
US9830276B2Nov 28, 2017
Replaying memory transactions while resolving memory access faults
NVIDIA CORP0 citations51
US9720858B2Aug 1, 2017
Technique for performing memory access operations via texture hardware
NVIDIA CORP0 citations51
US9361105B2Jun 7, 2016
Technique for counting values in a register
NVIDIA CORP0 citations51
US11954518B2Apr 9, 2024
User-defined metered priority queues
NVIDIA CORP0 citations49
US9697006B2Jul 4, 2017
Technique for performing memory access operations via texture hardware
NVIDIA CORP0 citations41
NICKOLLS JOHN R
4 patentsUS9519947B2Dec 13, 2016
Architecture and instructions for accessing multi-dimensional formatted surface memory
NICKOLLS JOHN R33 citations93
US8200947B1Jun 12, 2012
Systems and methods for voting among parallel threads
NICKOLLS JOHN R11 citations82
US8214625B1Jul 3, 2012
Systems and methods for voting among parallel threads
NICKOLLS JOHN R1 citations60
US10152328B2Dec 11, 2018
Systems and methods for voting among parallel threads
NICKOLLS JOHN R0 citations50
FAHS BRIAN
3 patentsUS8751771B2Jun 10, 2014
Efficient implementation of arrays of structures on SIMT and SIMD architectures
FAHS BRIAN9 citations83
US8850436B2Sep 30, 2014
Opcode-specified predicatable warp post-synchronization
FAHS BRIAN2 citations61
US8539204B2Sep 17, 2013
Cooperative thread array reduction and scan operations
FAHS BRIAN2 citations61