Inventor
NATARAJAN MAHADEVA IYER
US34 patents
⚠️ This page may combine multiple inventors who share the name “NATARAJAN MAHADEVA IYER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
22 patentsUS10083952B2Sep 25, 2018
Diode-triggered schottky silicon-controlled rectifier for Fin-FET electrostatic discharge control
GLOBALFOUNDRIES INC9 citations84
US9177951B2Nov 3, 2015
Three-dimensional electrostatic discharge semiconductor device
GLOBALFOUNDRIES INC7 citations84
US9385527B2Jul 5, 2016
Enhanced charge device model clamp
GLOBALFOUNDRIES INC8 citations82
US10115718B2Oct 30, 2018
Method, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection
GLOBALFOUNDRIES INC2 citations73
US9679888B1Jun 13, 2017
ESD device for a semiconductor structure
GLOBALFOUNDRIES INC6 citations73
US9030791B2May 12, 2015
Enhanced charge device model clamp
GLOBALFOUNDRIES INC4 citations71
US10211168B1Feb 19, 2019
Dissipation of static charge from wiring layers during manufacturing
GLOBALFOUNDRIES INC6 citations68
US9620587B2Apr 11, 2017
Three-dimensional electrostatic discharge semiconductor device
GLOBALFOUNDRIES INC1 citations63
US9455316B2Sep 27, 2016
Three-dimensional electrostatic discharge semiconductor device
GLOBALFOUNDRIES INC1 citations63
US10373946B2Aug 6, 2019
Diode-triggered Schottky silicon-controlled rectifier for Fin-FET electrostatic discharge control
GLOBALFOUNDRIES INC1 citations62
US10790276B2Sep 29, 2020
Methods, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection
GLOBALFOUNDRIES INC0 citations52
US10147715B2Dec 4, 2018
Methods for an ESD protection circuit including trigger-voltage tunable cascode transistors
GLOBALFOUNDRIES INC0 citations52
US9653454B1May 16, 2017
Methods for an ESD protection circuit including trigger-voltage tunable cascode transistors
GLOBALFOUNDRIES INC1 citations52
US9601486B2Mar 21, 2017
ESD snapback based clamp for finFET
GLOBALFOUNDRIES INC0 citations52
US9349718B2May 24, 2016
ESD snapback based clamp for finFET
GLOBALFOUNDRIES INC0 citations52
US10833012B2Nov 10, 2020
Transistor structures having electrically floating metal layers between active metal lines
GLOBALFOUNDRIES INC0 citations51
US10741542B2Aug 11, 2020
Transistors patterned with electrostatic discharge protection and methods of fabrication
GLOBALFOUNDRIES INC0 citations51
US10510663B2Dec 17, 2019
Transistor structures having electrically floating metal layer between active metal lines
GLOBALFOUNDRIES INC0 citations51
US10403622B2Sep 3, 2019
Electrostatic discharge protection device and methods
GLOBALFOUNDRIES INC0 citations51
US10068895B2Sep 4, 2018
Transistors patterned with electrostatic discharge protection and methods of fabrication
GLOBALFOUNDRIES INC0 citations51
US9343590B2May 17, 2016
Planar semiconductor ESD device and method of making same
GLOBALFOUNDRIES INC0 citations51
US9831236B2Nov 28, 2017
Electrostatic discharge (ESD) protection transistor devices and integrated circuits with electrostatic discharge protection transistor devices
GLOBALFOUNDRIES INC0 citations40
LAI DA-WEI
6 patentsUS8913357B2Dec 16, 2014
ESD protection circuit
LAI DA-WEI2 citations62
US8778743B2Jul 15, 2014
Latch-up robust PNP-triggered SCR-based devices
LAI DA-WEI1 citations51
US8724271B2May 13, 2014
ESD-robust I/O driver circuits
LAI DA-WEI0 citations51
US9154122B2Oct 6, 2015
Latch up detection
LAI DA-WEI0 citations41
US8913358B2Dec 16, 2014
Latch-up immune ESD protection
LAI DA-WEI0 citations41
US8879221B2Nov 4, 2014
ESD protection without latch-up
LAI DA-WEI0 citations37