Inventor

LATTIMORE GEORGE MCNEIL

US64 patents

⚠️ This page may combine multiple inventors who share the name “LATTIMORE GEORGE MCNEIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LATTIMORE GEORGE MCNEIL

IBM

Sensing circuit for a memory cell array

Selectable differential or single-ended mode bus

Circuit driver on SOI for merged logic and memory circuits

Memory system having a vertical bitline topology and method therefor

Memory cell

Data processing system having memory sub-array redundancy and method therefor

Apparatus for unaligned cache reads and methods therefor

Apparatus and method of utilizing Alias Hit signals to detect errors within the real address tag arrays

Data processing system including load/store unit having a real address tag array and method for correcting effective address aliasing

System and method for controlling a memory array in an information handling system

Memory system having a unidirectional bus and method for communicating therewith

Memory in a data processing system having improved performance and method therefor

Data processing system and method for implementing a multi-port memory cell

Redundant memory array

System and method for testing self-timed memory arrays

Creating inversions in ripple domino logic

Cache sub-array method and apparatus for use in microprocessor integrated circuits

Conditional restore for RAM based on feedback from a RAM cell to precharge circuitry

Conditional restore for SRAM

Multiport memory cell having a reduced number of write wordlines

Memory system having a unidirectional bus and method for communicating therewith

Memory array and method for writing data to memory

Method and apparatus for memory cell array boost amplifier

Bit line boost amplifier

Bit switch circuit and bit line selection method

Method and apparatus for single clocked, non-overlapping access in a multi-port memory cell

Memory in a data processing system having uneven cell grouping on bitlines and method therefor

Self-restore circuit with soft error protection for dynamic logic circuits

Sense amplifier/comparator circuit and data comparison method

Method and apparatus for high speed comparison

Conditional restore for execution unit

ADVANCED RISC MACH LTD

Memory write driver, method and system

Programmable current for correlated electron switch

Programmable voltage reference

Sense amplifier

CES-based latching circuits

Backup and/or restore of a memory circuit

Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array

Method, system and device for non-volatile memory device operation

Port modes for use with memory

Devices and methods for controlling write operations

Apparatus and method for obfuscating power consumption of a processor

Retention voltages for integrated circuits

Efficient power distribution

Efficient power distribution

Programmable voltage reference

Programmable current for correlated electron switch

Apparatus and method for masking power consumption of a processor

CES-based latching circuits

Apparatus and method for masking power consumption of a processor