Inventor
MORRIS TONIA G
US27 patents
⚠️ This page may combine multiple inventors who share the name “MORRIS TONIA G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
26 patentsUS7289806B2Oct 30, 2007
Method and apparatus for context enabled search
INTEL CORP155 citations99
US6526395B1Feb 25, 2003
Application of personality models and interaction with synthetic characters in a computing system
INTEL CORP419 citations99
US6665010B1Dec 16, 2003
Controlling integration times of pixel sensors
INTEL CORP130 citations98
US6573936B2Jun 3, 2003
Method and apparatus for providing a single-instruction multiple data digital camera system that integrates on-chip sensing and parallel processing
INTEL CORP120 citations93
US6366317B1Apr 2, 2002
Motion estimation using intrapixel logic
INTEL CORP57 citations93
US9025399B1May 5, 2015
Method for training a control signal based on a strobe signal in a memory module
INTEL CORP36 citations92
US6657663B2Dec 2, 2003
Pre-subtracting architecture for enabling multiple spectrum image sensing
INTEL CORP30 citations92
US7098952B2Aug 29, 2006
Imager having multiple storage locations for each pixel sensor
INTEL CORP41 citations89
US11061590B2Jul 13, 2021
Efficiently training memory device chip select control
INTEL CORP7 citations84
US10416912B2Sep 17, 2019
Efficiently training memory device chip select control
INTEL CORP8 citations84
US10482041B2Nov 19, 2019
Read training a memory controller
INTEL CORP3 citations83
US9021154B2Apr 28, 2015
Read training a memory controller
INTEL CORP9 citations83
US10148416B2Dec 4, 2018
Signal phase optimization in memory interface training
INTEL CORP8 citations82
US9627029B2Apr 18, 2017
Method for training a control signal based on a strobe signal in a memory module
INTEL CORP9 citations82
US6741282B1May 25, 2004
Method and apparatus for processing a photocurrent in both discrete and continuous time
INTEL CORP8 citations74
US11360874B2Jun 14, 2022
Registering clock driver controlled decision feedback equalizer training process
INTEL CORP2 citations73
US6697112B2Feb 24, 2004
Imaging system having multiple image capture modes
INTEL CORP12 citations73
US10891243B2Jan 12, 2021
Memory bus MR register programming process
INTEL CORP4 citations72
US10380043B2Aug 13, 2019
Memory bus MR register programming process
INTEL CORP2 citations72
US10331585B2Jun 25, 2019
Read training a memory controller
INTEL CORP2 citations72
US9766817B2Sep 19, 2017
Read training a memory controller
INTEL CORP2 citations72
US12009023B2Jun 11, 2024
Training for chip select signal read operations by memory devices
INTEL CORP6 citations68
US10997096B2May 4, 2021
Enumerated per device addressability for memory subsystems
INTEL CORP1 citations62
US9495103B2Nov 15, 2016
Read training a memory controller
INTEL CORP1 citations62
US9058111B2Jun 16, 2015
Read training a memory controller
INTEL CORP2 citations62
US11435909B2Sep 6, 2022
Device, system and method to generate link training signals
INTEL CORP0 citations40