Inventor

ARORA SAMPAN

IN5 patents

⚠️ This page may combine multiple inventors who share the name “ARORA SAMPAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

4 patents

US7669083B2Feb 23, 2010

System and method for re-shuffling test case instruction orders for processor design verification and validation

IBM22 citations89

US7661023B2Feb 9, 2010

System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation

IBM9 citations82

US7689886B2Mar 30, 2010

System and method for predicting lwarx and stwcx instructions in test pattern generation and simulation for processor design verification and validation

IBM7 citations71

US8006221B2Aug 23, 2011

System and method for testing multiple processor modes for processor design verification and validation

IBM2 citations58

ARORA SAMPAN

1 patent

US8127192B2Feb 28, 2012

Predicting lwarx and stwcx instructions in test pattern generation and simulation for processor design verification/validation in interrupt mode

ARORA SAMPAN4 citations54