Inventor

MENG QINGCHAO

CN40 patents

⚠️ This page may combine multiple inventors who share the name “MENG QINGCHAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MENG QINGCHAO

TAIWAN SEMICONDUCTOR MFG CO LTD

ESD protection scheme using I/O pads

Method for forming a timing circuit arrangements for flip-flops

Timing circuit arrangements for flip-flops

Failsafe interface circuit and related method

Method of and apparatus for controlling clock signal

Multi-bit level shifter and method of operating same

Multiplexer for SDFQ having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing same

Combined function IC cell device, layout, and method

Multi-bit level shifter

Method for forming a timing circuit arrangements for flip-flops

Integrated circuit device

Level shifter circuit and method of operating the same

Integrated circuit device

Level shifter circuit and method of operating the same

Method of method of forming a multi-bit level shifter

Semiconductor device having interleaved clock gate blocks and decoupling capacitor blocks and method of operating same

Semiconductor device with common deep N-well for different voltage domains and method of forming same

Combined function IC cell layout method and system

Method of and apparatus for controlling clock signal

Multiplexer for SDFQ having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing same

Method for intra-cell-repurposing dummy transistors and semiconductor device having repurposed formerly dummy transistors

Shared well structure manufacturing method

Shared well structure, layout, and method

Method of forming semiconductor device including daisy-chained delay cells

Semiconductor device with daisy-chained delay cells and method of forming same

Semiconductor device with T-shaped active region and methods of forming same

Bi-directional scan flip-flop circuit and method

Semiconductor device having interleaved clock gate blocks and decoupling capacitor blocks and method of operating same

Circuit arrangements having reduced dependency on layout environment

Current-distributing pin structure and method of forming same

Voltage level shift circuit for multiple voltage integrated circuits

BOE TECHNOLOGY GROUP CO LTD

Thin film transistor, array substrate, manufacturing method and display device

OGS touch screen substrate bridge structure and manufacturing method thereof, OGS touch screen and its manufacturing method as well as display device

Pixel unit driving circuit and driving method, pixel unit and display apparatus

HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTD

Flexible touch panel comprising a flexible substrate with a fan-out region, manufacturing method thereof and flexible touch display

Touch display panel, method of manufacturing touch display panel, and display apparatus

TAIWAN SEMICONDUCTOR MFG

Multiple voltage input buffer and related method

Voltage level shift circuit for multiple voltage integrated circuits

BEIJING BOE TECHNOLOGY DEV CO LTD

Touch panel and manufacturing method thereof, display device

HEFEI BOE OPTOELECTRONICS TECH

Array substrate and method for producing the same, display